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authorRussell King <rmk+kernel@arm.linux.org.uk>2009-12-24 07:52:44 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-12-24 08:39:18 -0500
commit382b4480ff832e472d76c99f3f75fffb30e118c0 (patch)
treecaddb10180a24cda8b0ed280688dde14dcb7232e /arch/arm/mach-footbridge/isa-rtc.c
parent6dc995a3da9adfa83d61ccf06aa1afa5f6ab764f (diff)
ARM: footbridge: trim down old ISA rtc setup
This fixes a "start_kernel(): bug: interrupts were enabled early". rtc_cmos now takes care of initializing the ISA RTC and reading the current time and date from it; there's no need to repeat that here, thereby causing interrupts to be enabled too early. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-footbridge/isa-rtc.c')
-rw-r--r--arch/arm/mach-footbridge/isa-rtc.c57
1 files changed, 57 insertions, 0 deletions
diff --git a/arch/arm/mach-footbridge/isa-rtc.c b/arch/arm/mach-footbridge/isa-rtc.c
new file mode 100644
index 000000000000..07fde4051f78
--- /dev/null
+++ b/arch/arm/mach-footbridge/isa-rtc.c
@@ -0,0 +1,57 @@
1/*
2 * arch/arm/mach-footbridge/isa-rtc.c
3 *
4 * Copyright (C) 1998 Russell King.
5 * Copyright (C) 1998 Phil Blundell
6 *
7 * CATS has a real-time clock, though the evaluation board doesn't.
8 *
9 * Changelog:
10 * 21-Mar-1998 RMK Created
11 * 27-Aug-1998 PJB CATS support
12 * 28-Dec-1998 APH Made leds optional
13 * 20-Jan-1999 RMK Started merge of EBSA285, CATS and NetWinder
14 * 16-Mar-1999 RMK More support for EBSA285-like machines with RTCs in
15 */
16
17#define RTC_PORT(x) (0x70+(x))
18#define RTC_ALWAYS_BCD 0
19
20#include <linux/init.h>
21#include <linux/mc146818rtc.h>
22#include <linux/bcd.h>
23#include <linux/io.h>
24
25#include "common.h"
26
27void __init isa_rtc_init(void)
28{
29 int reg_d, reg_b;
30
31 /*
32 * Probe for the RTC.
33 */
34 reg_d = CMOS_READ(RTC_REG_D);
35
36 /*
37 * make sure the divider is set
38 */
39 CMOS_WRITE(RTC_REF_CLCK_32KHZ, RTC_REG_A);
40
41 /*
42 * Set control reg B
43 * (24 hour mode, update enabled)
44 */
45 reg_b = CMOS_READ(RTC_REG_B) & 0x7f;
46 reg_b |= 2;
47 CMOS_WRITE(reg_b, RTC_REG_B);
48
49 if ((CMOS_READ(RTC_REG_A) & 0x7f) == RTC_REF_CLCK_32KHZ &&
50 CMOS_READ(RTC_REG_B) == reg_b) {
51 /*
52 * We have a RTC. Check the battery
53 */
54 if ((reg_d & 0x80) == 0)
55 printk(KERN_WARNING "RTC: *** warning: CMOS battery bad\n");
56 }
57}