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authorKyongHo Cho <pullip.cho@samsung.com>2011-03-06 18:56:48 -0500
committerKukjin Kim <kgene.kim@samsung.com>2011-03-15 08:37:25 -0400
commitb34f003f271d477f61a980d280afc77929047440 (patch)
tree475069c7d6760669ad79eb1d2cc07dd981cdf143 /arch/arm/mach-exynos4
parent721bbd4a06e83995ac1679d9cdca19a608fb0122 (diff)
ARM: EXYNOS4: Enhancement of System MMU driver
This patch includes the following enhancements for System MMU: - Enhanced readability - Removal of unused data structures or their members - Simplified function definitions - Corrections of some logical errors - Full compliance with Linux coding style - Simpler way of registering callback functions of System MMU faults Signed-off-by: KyongHo Cho <pullip.cho@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos4')
-rw-r--r--arch/arm/mach-exynos4/dev-sysmmu.c23
-rw-r--r--arch/arm/mach-exynos4/include/mach/regs-sysmmu.h4
-rw-r--r--arch/arm/mach-exynos4/include/mach/sysmmu.h88
3 files changed, 30 insertions, 85 deletions
diff --git a/arch/arm/mach-exynos4/dev-sysmmu.c b/arch/arm/mach-exynos4/dev-sysmmu.c
index a10790a614ec..6889c9aa6493 100644
--- a/arch/arm/mach-exynos4/dev-sysmmu.c
+++ b/arch/arm/mach-exynos4/dev-sysmmu.c
@@ -15,6 +15,28 @@
15 15
16#include <mach/map.h> 16#include <mach/map.h>
17#include <mach/irqs.h> 17#include <mach/irqs.h>
18#include <mach/sysmmu.h>
19#include <plat/s5p-clock.h>
20
21/* These names must be equal to the clock names in mach-exynos4/clock.c */
22const char *sysmmu_ips_name[EXYNOS4_SYSMMU_TOTAL_IPNUM] = {
23 "SYSMMU_MDMA" ,
24 "SYSMMU_SSS" ,
25 "SYSMMU_FIMC0" ,
26 "SYSMMU_FIMC1" ,
27 "SYSMMU_FIMC2" ,
28 "SYSMMU_FIMC3" ,
29 "SYSMMU_JPEG" ,
30 "SYSMMU_FIMD0" ,
31 "SYSMMU_FIMD1" ,
32 "SYSMMU_PCIe" ,
33 "SYSMMU_G2D" ,
34 "SYSMMU_ROTATOR",
35 "SYSMMU_MDMA2" ,
36 "SYSMMU_TV" ,
37 "SYSMMU_MFC_L" ,
38 "SYSMMU_MFC_R" ,
39};
18 40
19static struct resource exynos4_sysmmu_resource[] = { 41static struct resource exynos4_sysmmu_resource[] = {
20 [0] = { 42 [0] = {
@@ -185,5 +207,4 @@ struct platform_device exynos4_device_sysmmu = {
185 .num_resources = ARRAY_SIZE(exynos4_sysmmu_resource), 207 .num_resources = ARRAY_SIZE(exynos4_sysmmu_resource),
186 .resource = exynos4_sysmmu_resource, 208 .resource = exynos4_sysmmu_resource,
187}; 209};
188
189EXPORT_SYMBOL(exynos4_device_sysmmu); 210EXPORT_SYMBOL(exynos4_device_sysmmu);
diff --git a/arch/arm/mach-exynos4/include/mach/regs-sysmmu.h b/arch/arm/mach-exynos4/include/mach/regs-sysmmu.h
index b6aef863b9d6..68ff6ad08a2b 100644
--- a/arch/arm/mach-exynos4/include/mach/regs-sysmmu.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-sysmmu.h
@@ -19,6 +19,10 @@
19#define S5P_MMU_FLUSH 0x00C 19#define S5P_MMU_FLUSH 0x00C
20#define S5P_PT_BASE_ADDR 0x014 20#define S5P_PT_BASE_ADDR 0x014
21#define S5P_INT_STATUS 0x018 21#define S5P_INT_STATUS 0x018
22#define S5P_INT_CLEAR 0x01C
22#define S5P_PAGE_FAULT_ADDR 0x024 23#define S5P_PAGE_FAULT_ADDR 0x024
24#define S5P_AW_FAULT_ADDR 0x028
25#define S5P_AR_FAULT_ADDR 0x02C
26#define S5P_DEFAULT_SLAVE_ADDR 0x030
23 27
24#endif /* __ASM_ARCH_REGS_SYSMMU_H */ 28#endif /* __ASM_ARCH_REGS_SYSMMU_H */
diff --git a/arch/arm/mach-exynos4/include/mach/sysmmu.h b/arch/arm/mach-exynos4/include/mach/sysmmu.h
index 1428adad8379..eff3dc37f3da 100644
--- a/arch/arm/mach-exynos4/include/mach/sysmmu.h
+++ b/arch/arm/mach-exynos4/include/mach/sysmmu.h
@@ -13,9 +13,6 @@
13#ifndef __ASM_ARM_ARCH_SYSMMU_H 13#ifndef __ASM_ARM_ARCH_SYSMMU_H
14#define __ASM_ARM_ARCH_SYSMMU_H __FILE__ 14#define __ASM_ARM_ARCH_SYSMMU_H __FILE__
15 15
16#define EXYNOS4_SYSMMU_TOTAL_IPNUM 16
17#define S5P_SYSMMU_TOTAL_IPNUM EXYNOS4_SYSMMU_TOTAL_IPNUM
18
19enum exynos4_sysmmu_ips { 16enum exynos4_sysmmu_ips {
20 SYSMMU_MDMA, 17 SYSMMU_MDMA,
21 SYSMMU_SSS, 18 SYSMMU_SSS,
@@ -33,90 +30,13 @@ enum exynos4_sysmmu_ips {
33 SYSMMU_TV, 30 SYSMMU_TV,
34 SYSMMU_MFC_L, 31 SYSMMU_MFC_L,
35 SYSMMU_MFC_R, 32 SYSMMU_MFC_R,
33 EXYNOS4_SYSMMU_TOTAL_IPNUM,
36}; 34};
37 35
38static char *sysmmu_ips_name[EXYNOS4_SYSMMU_TOTAL_IPNUM] = { 36#define S5P_SYSMMU_TOTAL_IPNUM EXYNOS4_SYSMMU_TOTAL_IPNUM
39 "SYSMMU_MDMA" ,
40 "SYSMMU_SSS" ,
41 "SYSMMU_FIMC0" ,
42 "SYSMMU_FIMC1" ,
43 "SYSMMU_FIMC2" ,
44 "SYSMMU_FIMC3" ,
45 "SYSMMU_JPEG" ,
46 "SYSMMU_FIMD0" ,
47 "SYSMMU_FIMD1" ,
48 "SYSMMU_PCIe" ,
49 "SYSMMU_G2D" ,
50 "SYSMMU_ROTATOR",
51 "SYSMMU_MDMA2" ,
52 "SYSMMU_TV" ,
53 "SYSMMU_MFC_L" ,
54 "SYSMMU_MFC_R" ,
55};
56
57typedef enum exynos4_sysmmu_ips sysmmu_ips;
58
59struct sysmmu_tt_info {
60 unsigned long *pgd;
61 unsigned long pgd_paddr;
62 unsigned long *pte;
63};
64
65struct sysmmu_controller {
66 const char *name;
67
68 /* channels registers */
69 void __iomem *regs;
70
71 /* channel irq */
72 unsigned int irq;
73
74 sysmmu_ips ips;
75
76 /* Translation Table Info. */
77 struct sysmmu_tt_info *tt_info;
78
79 struct resource *mem;
80 struct device *dev;
81
82 /* SysMMU controller enable - true : enable */
83 bool enable;
84};
85
86/**
87 * s5p_sysmmu_enable() - enable system mmu of ip
88 * @ips: The ip connected system mmu.
89 *
90 * This function enable system mmu to transfer address
91 * from virtual address to physical address
92 */
93int s5p_sysmmu_enable(sysmmu_ips ips);
94 37
95/** 38extern const char *sysmmu_ips_name[EXYNOS4_SYSMMU_TOTAL_IPNUM];
96 * s5p_sysmmu_disable() - disable sysmmu mmu of ip
97 * @ips: The ip connected system mmu.
98 *
99 * This function disable system mmu to transfer address
100 * from virtual address to physical address
101 */
102int s5p_sysmmu_disable(sysmmu_ips ips);
103 39
104/** 40typedef enum exynos4_sysmmu_ips sysmmu_ips;
105 * s5p_sysmmu_set_tablebase_pgd() - set page table base address to refer page table
106 * @ips: The ip connected system mmu.
107 * @pgd: The page table base address.
108 *
109 * This function set page table base address
110 * When system mmu transfer address from virtaul address to physical address,
111 * system mmu refer address information from page table
112 */
113int s5p_sysmmu_set_tablebase_pgd(sysmmu_ips ips, unsigned long pgd);
114 41
115/**
116 * s5p_sysmmu_tlb_invalidate() - flush all TLB entry in system mmu
117 * @ips: The ip connected system mmu.
118 *
119 * This function flush all TLB entry in system mmu
120 */
121int s5p_sysmmu_tlb_invalidate(sysmmu_ips ips);
122#endif /* __ASM_ARM_ARCH_SYSMMU_H */ 42#endif /* __ASM_ARM_ARCH_SYSMMU_H */