ARM: EXYNOS4: Add platform device and helper functions for FIMD

This patch adds platform device s5p_device_fimd0 for EXYNOS4 FIMD0.
EXYNOS4 has two FIMDs(FIMD0, FIMD1). FIMD1 will be added later.
Some definitions used to enable EXYNOS4 FIMD0 are added.

Signed-off-by: Jonghun Han <jonghun.han@samsung.com>
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

4 files changed, 56 insertions, 0 deletions

diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index b735705c8b47..75982b53e527 100644
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -26,6 +26,11 @@ config EXYNOS4_DEV_AHCI
         help
           Compile in platform device definitions for AHCI
 
+config EXYNOS4_SETUP_FIMD0
+        bool
+        help
+          Common setup code for FIMD0.
+
 config EXYNOS4_DEV_PD
         bool
         help
@@ -109,6 +114,7 @@ menu "EXYNOS4 Machines"
 config MACH_SMDKC210
         bool "SMDKC210"
         select CPU_EXYNOS4210
+        select S5P_DEV_FIMD0
         select S3C_DEV_RTC
         select S3C_DEV_WDT
         select S3C_DEV_I2C1
@@ -118,6 +124,7 @@ config MACH_SMDKC210
         select S3C_DEV_HSMMC3
         select EXYNOS4_DEV_PD
         select EXYNOS4_DEV_SYSMMU
+        select EXYNOS4_SETUP_FIMD0
         select EXYNOS4_SETUP_I2C1
         select EXYNOS4_SETUP_SDHCI
         help
@@ -126,6 +133,7 @@ config MACH_SMDKC210
 config MACH_SMDKV310
         bool "SMDKV310"
         select CPU_EXYNOS4210
+        select S5P_DEV_FIMD0
         select S3C_DEV_RTC
         select S3C_DEV_WDT
         select S3C_DEV_I2C1
@@ -137,6 +145,7 @@ config MACH_SMDKV310
         select SAMSUNG_DEV_KEYPAD
         select EXYNOS4_DEV_PD
         select EXYNOS4_DEV_SYSMMU
+        select EXYNOS4_SETUP_FIMD0
         select EXYNOS4_SETUP_I2C1
         select EXYNOS4_SETUP_KEYPAD
         select EXYNOS4_SETUP_SDHCI
diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
index 2a0b68220b2f..e8b33aba14d8 100644
--- a/arch/arm/mach-exynos4/Makefile
+++ b/arch/arm/mach-exynos4/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_EXYNOS4_DEV_SYSMMU)	+= dev-sysmmu.o
 obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
 
 obj-$(CONFIG_EXYNOS4_SETUP_FIMC)        += setup-fimc.o
+obj-$(CONFIG_EXYNOS4_SETUP_FIMD0)       += setup-fimd0.o
 obj-$(CONFIG_EXYNOS4_SETUP_I2C1)        += setup-i2c1.o
 obj-$(CONFIG_EXYNOS4_SETUP_I2C2)        += setup-i2c2.o
 obj-$(CONFIG_EXYNOS4_SETUP_I2C3)        += setup-i2c3.o
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index b0370f79ce7e..2d8a40c9e6e5 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -25,6 +25,7 @@
 #include <plat/adc-core.h>
 #include <plat/sdhci.h>
 #include <plat/devs.h>
+#include <plat/fb-core.h>
 #include <plat/fimc-core.h>
 #include <plat/iic-core.h>
 
@@ -153,6 +154,8 @@ void __init exynos4_map_io(void)
         s3c_i2c0_setname("s3c2440-i2c");
         s3c_i2c1_setname("s3c2440-i2c");
         s3c_i2c2_setname("s3c2440-i2c");
+
+        s5p_fb_setname(0, "exynos4-fb");
 }
 
 void __init exynos4_init_clocks(int xtal)
diff --git a/arch/arm/mach-exynos4/setup-fimd0.c b/arch/arm/mach-exynos4/setup-fimd0.c
new file mode 100644
index 000000000000..07a6dbeecdd0
--- /dev/null
+++ b/arch/arm/mach-exynos4/setup-fimd0.c
@@ -0,0 +1,43 @@
+/* linux/arch/arm/mach-exynos4/setup-fimd0.c
+ *
+ * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
+ *             http://www.samsung.com
+ *
+ * Base Exynos4 FIMD 0 configuration
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/fb.h>
+#include <linux/gpio.h>
+
+#include <plat/gpio-cfg.h>
+#include <plat/regs-fb-v4.h>
+
+#include <mach/map.h>
+
+void exynos4_fimd0_gpio_setup_24bpp(void)
+{
+        unsigned int reg;
+
+        s3c_gpio_cfgrange_nopull(EXYNOS4_GPF0(0), 8, S3C_GPIO_SFN(2));
+        s3c_gpio_cfgrange_nopull(EXYNOS4_GPF1(0), 8, S3C_GPIO_SFN(2));
+        s3c_gpio_cfgrange_nopull(EXYNOS4_GPF2(0), 8, S3C_GPIO_SFN(2));
+        s3c_gpio_cfgrange_nopull(EXYNOS4_GPF3(0), 4, S3C_GPIO_SFN(2));
+
+        /*
+         * Set DISPLAY_CONTROL register for Display path selection.
+         *
+         * DISPLAY_CONTROL[1:0]
+         * ---------------------
+         *  00 | MIE
+         *  01 | MDINE
+         *  10 | FIMD : selected
+         *  11 | FIMD
+         */
+        reg = __raw_readl(S3C_VA_SYS + 0x0210);
+        reg |= (1 << 1);
+        __raw_writel(reg, S3C_VA_SYS + 0x0210);
+}