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authorKukjin Kim <kgene.kim@samsung.com>2011-06-01 18:09:05 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-06-01 18:27:53 -0400
commit08115a139229ca84adfef4d5983c3c186b9d1c30 (patch)
tree6bc3e2f1fe07d5365f982d9be80996f1dc5780f8 /arch/arm/mach-exynos4
parent457d4fe85138c0d313c92ef34ea892c73b0fe2f5 (diff)
ARM: S5P: Should be S3C_VA_USB_HSPHY instead of S5P_VA_XX
Basically, other S3C SoCs and S5PC100 use 'S3C_VA_USB_HSPHY' commonly. It should be changed to 'S3C_VA_USB_HSPHY' for common usage and others. Now happens build error on S5PC100. Cc: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos4')
-rw-r--r--arch/arm/mach-exynos4/cpu.c2
-rw-r--r--arch/arm/mach-exynos4/include/mach/regs-usb-phy.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 08813a6f66b1..9babe4473e88 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -98,7 +98,7 @@ static struct map_desc exynos4_iodesc[] __initdata = {
98 .length = SZ_4K, 98 .length = SZ_4K,
99 .type = MT_DEVICE, 99 .type = MT_DEVICE,
100 }, { 100 }, {
101 .virtual = (unsigned long)S5P_VA_USB_HSPHY, 101 .virtual = (unsigned long)S3C_VA_USB_HSPHY,
102 .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY), 102 .pfn = __phys_to_pfn(EXYNOS4_PA_HSPHY),
103 .length = SZ_4K, 103 .length = SZ_4K,
104 .type = MT_DEVICE, 104 .type = MT_DEVICE,
diff --git a/arch/arm/mach-exynos4/include/mach/regs-usb-phy.h b/arch/arm/mach-exynos4/include/mach/regs-usb-phy.h
index 703118d5173c..c337cf3a71bf 100644
--- a/arch/arm/mach-exynos4/include/mach/regs-usb-phy.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-usb-phy.h
@@ -11,7 +11,7 @@
11#ifndef __PLAT_S5P_REGS_USB_PHY_H 11#ifndef __PLAT_S5P_REGS_USB_PHY_H
12#define __PLAT_S5P_REGS_USB_PHY_H 12#define __PLAT_S5P_REGS_USB_PHY_H
13 13
14#define EXYNOS4_HSOTG_PHYREG(x) ((x) + S5P_VA_USB_HSPHY) 14#define EXYNOS4_HSOTG_PHYREG(x) ((x) + S3C_VA_USB_HSPHY)
15 15
16#define EXYNOS4_PHYPWR EXYNOS4_HSOTG_PHYREG(0x00) 16#define EXYNOS4_PHYPWR EXYNOS4_HSOTG_PHYREG(0x00)
17#define PHY1_HSIC_NORMAL_MASK (0xf << 9) 17#define PHY1_HSIC_NORMAL_MASK (0xf << 9)