diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-05-23 18:15:27 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-05-23 18:15:27 -0400 |
commit | 42cd71bf1e3a081b3150018bbf448cb6c8a844a5 (patch) | |
tree | 4a5d2eb0444255e4ad827a76dbd1417dd3876db6 /arch/arm/mach-exynos4 | |
parent | f5039935ac685b3b9b8c13fbc33cac8643dee32e (diff) | |
parent | 9a55d9752d8abfc62f1ab05ccc790d22a0c8e7c0 (diff) |
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (137 commits)
ARM: bcmring: convert to use sp804 clockevents
ARM: bcmring: convert to sp804 clocksource
ARM: 6912/1: bcmring: Add clkdev table in init_early
clockevents: ARM sp804: obtain sp804 timer rate via clks
clockevents: ARM sp804: allow clockevent name to be specified
clocksource: ARM sp804: obtain sp804 timer rate via clks
clocksource: ARM sp804: allow clocksource name to be specified
clocksource: convert OMAP1 to 32-bit down counting clocksource
clocksource: convert MXS timrotv2 to 32-bit down counting clocksource
clocksource: convert SPEAr platforms 16-bit up counting clocksource
clocksource: convert Integrator/AP 16-bit down counting clocksource
clocksource: convert W90x900 24-bit down counting clocksource
clocksource: convert ARM 32-bit down counting clocksources
clocksource: convert ARM 32-bit up counting clocksources
clocksource: add common mmio clocksource
ARM: update sa1100 to reflect PXA updates
ARM: omap1: convert to using readl/writel instead of volatile struct
ARM: omap1: delete useless interrupt handler
ARM: s5p: consolidate selection of timer register
ARM: 6939/1: fix missing 'cpu_relax()' declaration
...
Diffstat (limited to 'arch/arm/mach-exynos4')
-rw-r--r-- | arch/arm/mach-exynos4/include/mach/smp.h | 19 | ||||
-rw-r--r-- | arch/arm/mach-exynos4/irq-combiner.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-exynos4/platsmp.c | 5 |
3 files changed, 6 insertions, 24 deletions
diff --git a/arch/arm/mach-exynos4/include/mach/smp.h b/arch/arm/mach-exynos4/include/mach/smp.h deleted file mode 100644 index a463dcebcfd3..000000000000 --- a/arch/arm/mach-exynos4/include/mach/smp.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/include/mach/smp.h | ||
2 | * | ||
3 | * Cloned from arch/arm/mach-realview/include/mach/smp.h | ||
4 | */ | ||
5 | |||
6 | #ifndef ASM_ARCH_SMP_H | ||
7 | #define ASM_ARCH_SMP_H __FILE__ | ||
8 | |||
9 | #include <asm/hardware/gic.h> | ||
10 | |||
11 | /* | ||
12 | * We use IRQ1 as the IPI | ||
13 | */ | ||
14 | static inline void smp_cross_call(const struct cpumask *mask, int ipi) | ||
15 | { | ||
16 | gic_raise_softirq(mask, ipi); | ||
17 | } | ||
18 | |||
19 | #endif | ||
diff --git a/arch/arm/mach-exynos4/irq-combiner.c b/arch/arm/mach-exynos4/irq-combiner.c index f488b66d6806..5a2758ab055e 100644 --- a/arch/arm/mach-exynos4/irq-combiner.c +++ b/arch/arm/mach-exynos4/irq-combiner.c | |||
@@ -59,8 +59,7 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) | |||
59 | unsigned int cascade_irq, combiner_irq; | 59 | unsigned int cascade_irq, combiner_irq; |
60 | unsigned long status; | 60 | unsigned long status; |
61 | 61 | ||
62 | /* primary controller ack'ing */ | 62 | chained_irq_enter(chip, desc); |
63 | chip->irq_ack(&desc->irq_data); | ||
64 | 63 | ||
65 | spin_lock(&irq_controller_lock); | 64 | spin_lock(&irq_controller_lock); |
66 | status = __raw_readl(chip_data->base + COMBINER_INT_STATUS); | 65 | status = __raw_readl(chip_data->base + COMBINER_INT_STATUS); |
@@ -79,8 +78,7 @@ static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) | |||
79 | generic_handle_irq(cascade_irq); | 78 | generic_handle_irq(cascade_irq); |
80 | 79 | ||
81 | out: | 80 | out: |
82 | /* primary controller unmasking */ | 81 | chained_irq_exit(chip, desc); |
83 | chip->irq_unmask(&desc->irq_data); | ||
84 | } | 82 | } |
85 | 83 | ||
86 | static struct irq_chip combiner_chip = { | 84 | static struct irq_chip combiner_chip = { |
diff --git a/arch/arm/mach-exynos4/platsmp.c b/arch/arm/mach-exynos4/platsmp.c index 6d35878ec1aa..c5e65a02be8d 100644 --- a/arch/arm/mach-exynos4/platsmp.c +++ b/arch/arm/mach-exynos4/platsmp.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/io.h> | 22 | #include <linux/io.h> |
23 | 23 | ||
24 | #include <asm/cacheflush.h> | 24 | #include <asm/cacheflush.h> |
25 | #include <asm/hardware/gic.h> | ||
25 | #include <asm/smp_scu.h> | 26 | #include <asm/smp_scu.h> |
26 | #include <asm/unified.h> | 27 | #include <asm/unified.h> |
27 | 28 | ||
@@ -104,7 +105,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) | |||
104 | * the boot monitor to read the system wide flags register, | 105 | * the boot monitor to read the system wide flags register, |
105 | * and branch to the address found there. | 106 | * and branch to the address found there. |
106 | */ | 107 | */ |
107 | smp_cross_call(cpumask_of(cpu), 1); | 108 | gic_raise_softirq(cpumask_of(cpu), 1); |
108 | 109 | ||
109 | timeout = jiffies + (1 * HZ); | 110 | timeout = jiffies + (1 * HZ); |
110 | while (time_before(jiffies, timeout)) { | 111 | while (time_before(jiffies, timeout)) { |
@@ -147,6 +148,8 @@ void __init smp_init_cpus(void) | |||
147 | 148 | ||
148 | for (i = 0; i < ncores; i++) | 149 | for (i = 0; i < ncores; i++) |
149 | set_cpu_possible(i, true); | 150 | set_cpu_possible(i, true); |
151 | |||
152 | set_smp_cross_call(gic_raise_softirq); | ||
150 | } | 153 | } |
151 | 154 | ||
152 | void __init platform_smp_prepare_cpus(unsigned int max_cpus) | 155 | void __init platform_smp_prepare_cpus(unsigned int max_cpus) |