aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-exynos/pm.c
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2012-03-27 19:03:32 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2012-03-27 19:03:32 -0400
commitd61b7a572b292e2be409e13b4b3adf475f18fb29 (patch)
treee9d30390860147136c05e66abf1edda1bc5b0562 /arch/arm/mach-exynos/pm.c
parent18d9946bc7e2252fe3c0f2f609ac383c627edefd (diff)
parentf4e2467bad53023589cbff18dd1ab6e0aa3f004c (diff)
Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull "ARM: global cleanups" from Arnd Bergmann: "Quite a bit of code gets removed, and some stuff moved around, mostly the old samsung s3c24xx stuff. There should be no functional changes in this series otherwise. Some cleanups have dependencies on other arm-soc branches and will be sent in the second round. Signed-off-by: Arnd Bergmann <arnd@arndb.de>" Fixed up trivial conflicts mainly due to #include's being changes on both sides. * tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (121 commits) ep93xx: Remove unnecessary includes of ep93xx-regs.h ep93xx: Move EP93XX_SYSCON defines to SoC private header ep93xx: Move crunch code to mach-ep93xx directory ep93xx: Make syscon access functions private to SoC ep93xx: Configure GPIO ports in core code ep93xx: Move peripheral defines to local SoC header ep93xx: Convert the watchdog driver into a platform device. ep93xx: Use ioremap for backlight driver ep93xx: Move GPIO defines to gpio-ep93xx.h ep93xx: Don't use system controller defines in audio drivers ep93xx: Move PHYS_BASE defines to local SoC header file ARM: EXYNOS: Add clock register addresses for EXYNOS4X12 bus devfreq driver ARM: EXYNOS: add clock registers for exynos4x12-cpufreq PM / devfreq: update the name of EXYNOS clock registers that were omitted PM / devfreq: update the name of EXYNOS clock register ARM: EXYNOS: change the prefix S5P_ to EXYNOS4_ for clock ARM: EXYNOS: use static declaration on regarding clock ARM: EXYNOS: replace clock.c for other new EXYNOS SoCs ARM: OMAP2+: Fix build error after merge ARM: S3C24XX: remove call to s3c24xx_setup_clocks ...
Diffstat (limited to 'arch/arm/mach-exynos/pm.c')
-rw-r--r--arch/arm/mach-exynos/pm.c40
1 files changed, 20 insertions, 20 deletions
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index e19013051772..f105bd2b6765 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -38,29 +38,29 @@
38#include <mach/pmu.h> 38#include <mach/pmu.h>
39 39
40static struct sleep_save exynos4_set_clksrc[] = { 40static struct sleep_save exynos4_set_clksrc[] = {
41 { .reg = S5P_CLKSRC_MASK_TOP , .val = 0x00000001, }, 41 { .reg = EXYNOS4_CLKSRC_MASK_TOP , .val = 0x00000001, },
42 { .reg = S5P_CLKSRC_MASK_CAM , .val = 0x11111111, }, 42 { .reg = EXYNOS4_CLKSRC_MASK_CAM , .val = 0x11111111, },
43 { .reg = S5P_CLKSRC_MASK_TV , .val = 0x00000111, }, 43 { .reg = EXYNOS4_CLKSRC_MASK_TV , .val = 0x00000111, },
44 { .reg = S5P_CLKSRC_MASK_LCD0 , .val = 0x00001111, }, 44 { .reg = EXYNOS4_CLKSRC_MASK_LCD0 , .val = 0x00001111, },
45 { .reg = S5P_CLKSRC_MASK_MAUDIO , .val = 0x00000001, }, 45 { .reg = EXYNOS4_CLKSRC_MASK_MAUDIO , .val = 0x00000001, },
46 { .reg = S5P_CLKSRC_MASK_FSYS , .val = 0x01011111, }, 46 { .reg = EXYNOS4_CLKSRC_MASK_FSYS , .val = 0x01011111, },
47 { .reg = S5P_CLKSRC_MASK_PERIL0 , .val = 0x01111111, }, 47 { .reg = EXYNOS4_CLKSRC_MASK_PERIL0 , .val = 0x01111111, },
48 { .reg = S5P_CLKSRC_MASK_PERIL1 , .val = 0x01110111, }, 48 { .reg = EXYNOS4_CLKSRC_MASK_PERIL1 , .val = 0x01110111, },
49 { .reg = S5P_CLKSRC_MASK_DMC , .val = 0x00010000, }, 49 { .reg = EXYNOS4_CLKSRC_MASK_DMC , .val = 0x00010000, },
50}; 50};
51 51
52static struct sleep_save exynos4210_set_clksrc[] = { 52static struct sleep_save exynos4210_set_clksrc[] = {
53 { .reg = S5P_CLKSRC_MASK_LCD1 , .val = 0x00001111, }, 53 { .reg = EXYNOS4210_CLKSRC_MASK_LCD1 , .val = 0x00001111, },
54}; 54};
55 55
56static struct sleep_save exynos4_epll_save[] = { 56static struct sleep_save exynos4_epll_save[] = {
57 SAVE_ITEM(S5P_EPLL_CON0), 57 SAVE_ITEM(EXYNOS4_EPLL_CON0),
58 SAVE_ITEM(S5P_EPLL_CON1), 58 SAVE_ITEM(EXYNOS4_EPLL_CON1),
59}; 59};
60 60
61static struct sleep_save exynos4_vpll_save[] = { 61static struct sleep_save exynos4_vpll_save[] = {
62 SAVE_ITEM(S5P_VPLL_CON0), 62 SAVE_ITEM(EXYNOS4_VPLL_CON0),
63 SAVE_ITEM(S5P_VPLL_CON1), 63 SAVE_ITEM(EXYNOS4_VPLL_CON1),
64}; 64};
65 65
66static struct sleep_save exynos4_core_save[] = { 66static struct sleep_save exynos4_core_save[] = {
@@ -239,7 +239,7 @@ static void exynos4_restore_pll(void)
239 locktime = (3000 / pll_in_rate) * p_div; 239 locktime = (3000 / pll_in_rate) * p_div;
240 lockcnt = locktime * 10000 / (10000 / pll_in_rate); 240 lockcnt = locktime * 10000 / (10000 / pll_in_rate);
241 241
242 __raw_writel(lockcnt, S5P_EPLL_LOCK); 242 __raw_writel(lockcnt, EXYNOS4_EPLL_LOCK);
243 243
244 s3c_pm_do_restore_core(exynos4_epll_save, 244 s3c_pm_do_restore_core(exynos4_epll_save,
245 ARRAY_SIZE(exynos4_epll_save)); 245 ARRAY_SIZE(exynos4_epll_save));
@@ -257,7 +257,7 @@ static void exynos4_restore_pll(void)
257 locktime = 750; 257 locktime = 750;
258 lockcnt = locktime * 10000 / (10000 / pll_in_rate); 258 lockcnt = locktime * 10000 / (10000 / pll_in_rate);
259 259
260 __raw_writel(lockcnt, S5P_VPLL_LOCK); 260 __raw_writel(lockcnt, EXYNOS4_VPLL_LOCK);
261 261
262 s3c_pm_do_restore_core(exynos4_vpll_save, 262 s3c_pm_do_restore_core(exynos4_vpll_save,
263 ARRAY_SIZE(exynos4_vpll_save)); 263 ARRAY_SIZE(exynos4_vpll_save));
@@ -268,14 +268,14 @@ static void exynos4_restore_pll(void)
268 268
269 do { 269 do {
270 if (epll_wait) { 270 if (epll_wait) {
271 pll_con = __raw_readl(S5P_EPLL_CON0); 271 pll_con = __raw_readl(EXYNOS4_EPLL_CON0);
272 if (pll_con & (1 << S5P_EPLLCON0_LOCKED_SHIFT)) 272 if (pll_con & (1 << EXYNOS4_EPLLCON0_LOCKED_SHIFT))
273 epll_wait = 0; 273 epll_wait = 0;
274 } 274 }
275 275
276 if (vpll_wait) { 276 if (vpll_wait) {
277 pll_con = __raw_readl(S5P_VPLL_CON0); 277 pll_con = __raw_readl(EXYNOS4_VPLL_CON0);
278 if (pll_con & (1 << S5P_VPLLCON0_LOCKED_SHIFT)) 278 if (pll_con & (1 << EXYNOS4_VPLLCON0_LOCKED_SHIFT))
279 vpll_wait = 0; 279 vpll_wait = 0;
280 } 280 }
281 } while (epll_wait || vpll_wait); 281 } while (epll_wait || vpll_wait);