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authorAbhilash Kesavan <a.kesavan@samsung.com>2012-11-20 04:20:45 -0500
committerKukjin Kim <kgene.kim@samsung.com>2012-11-20 04:21:03 -0500
commit86ffb0e83a55aef81e96a9cede28af576c9d5541 (patch)
treedef9b87a007dbc1a057bb85c6f44624b78c8a054 /arch/arm/mach-exynos/pm.c
parentb9fa3e7b31928c0d767bf8e13ffbc6f35c20cac0 (diff)
ARM: EXYNOS: Fix i2c suspend/resume for legacy controller
On resuming from suspend the i2c configuration register that is part of system controller resets to 0xf. This sets the interrupt source to the new high speed i2c rather than the legacy one that we are using. Save and restore the I2C_CFG register for exynos5 to fix this. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/pm.c')
-rw-r--r--arch/arm/mach-exynos/pm.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index c06c992943a1..8306c5276d1c 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -62,6 +62,10 @@ static struct sleep_save exynos4_vpll_save[] = {
62 SAVE_ITEM(EXYNOS4_VPLL_CON1), 62 SAVE_ITEM(EXYNOS4_VPLL_CON1),
63}; 63};
64 64
65static struct sleep_save exynos5_sys_save[] = {
66 SAVE_ITEM(EXYNOS5_SYS_I2C_CFG),
67};
68
65static struct sleep_save exynos_core_save[] = { 69static struct sleep_save exynos_core_save[] = {
66 /* SROM side */ 70 /* SROM side */
67 SAVE_ITEM(S5P_SROM_BW), 71 SAVE_ITEM(S5P_SROM_BW),
@@ -98,6 +102,7 @@ static void exynos_pm_prepare(void)
98 s3c_pm_do_save(exynos4_epll_save, ARRAY_SIZE(exynos4_epll_save)); 102 s3c_pm_do_save(exynos4_epll_save, ARRAY_SIZE(exynos4_epll_save));
99 s3c_pm_do_save(exynos4_vpll_save, ARRAY_SIZE(exynos4_vpll_save)); 103 s3c_pm_do_save(exynos4_vpll_save, ARRAY_SIZE(exynos4_vpll_save));
100 } else { 104 } else {
105 s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save));
101 /* Disable USE_RETENTION of JPEG_MEM_OPTION */ 106 /* Disable USE_RETENTION of JPEG_MEM_OPTION */
102 tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION); 107 tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION);
103 tmp &= ~EXYNOS5_OPTION_USE_RETENTION; 108 tmp &= ~EXYNOS5_OPTION_USE_RETENTION;
@@ -301,6 +306,10 @@ static void exynos_pm_resume(void)
301 __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION); 306 __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION);
302 __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION); 307 __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION);
303 308
309 if (soc_is_exynos5250())
310 s3c_pm_do_restore(exynos5_sys_save,
311 ARRAY_SIZE(exynos5_sys_save));
312
304 s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save)); 313 s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save));
305 314
306 if (!soc_is_exynos5250()) { 315 if (!soc_is_exynos5250()) {