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authorShawn Guo <shawn.guo@linaro.org>2013-01-12 06:50:05 -0500
committerOlof Johansson <olof@lixom.net>2013-01-14 13:12:42 -0500
commit838a2ae80a6ab52139fb1bf0a93ea8c5eff94488 (patch)
tree5e5fbbc2005b012318b7474f9c6057b9ff3f3814 /arch/arm/mach-exynos/mct.c
parentc35ef95c273c06471818f9245a05ac5a6e3ffa34 (diff)
ARM: use clockevents_config_and_register() where possible
The clockevent core is able to figure out the best mult and shift, calculate min_delta_ns and max_delta_ns, with the necessary info passed into clockevents_config_and_register(). Use this combined configure and register function where possible to make the codes less error prone and gain some positive diff stat. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Anton Vorontsov <cbouatmailru@gmail.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Tested-by: Roland Stigge <stigge@antcom.de> Acked-by: Eric Miao <eric.y.miao@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: David Brown <davidb@codeaurora.org> Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Barry Song <baohua.song@csr.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Tony Prisk <linux@prisktech.co.nz> Cc: Lennert Buytenhek <buytenh@wantstofly.org> Cc: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jason Cooper <jason@lakedaemon.net> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-exynos/mct.c')
-rw-r--r--arch/arm/mach-exynos/mct.c18
1 files changed, 4 insertions, 14 deletions
diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c
index 57668eb68e75..070d51eea93e 100644
--- a/arch/arm/mach-exynos/mct.c
+++ b/arch/arm/mach-exynos/mct.c
@@ -255,13 +255,9 @@ static struct irqaction mct_comp_event_irq = {
255 255
256static void exynos4_clockevent_init(void) 256static void exynos4_clockevent_init(void)
257{ 257{
258 clockevents_calc_mult_shift(&mct_comp_device, clk_rate, 5);
259 mct_comp_device.max_delta_ns =
260 clockevent_delta2ns(0xffffffff, &mct_comp_device);
261 mct_comp_device.min_delta_ns =
262 clockevent_delta2ns(0xf, &mct_comp_device);
263 mct_comp_device.cpumask = cpumask_of(0); 258 mct_comp_device.cpumask = cpumask_of(0);
264 clockevents_register_device(&mct_comp_device); 259 clockevents_config_and_register(&mct_comp_device, clk_rate,
260 0xf, 0xffffffff);
265 261
266 if (soc_is_exynos5250()) 262 if (soc_is_exynos5250())
267 setup_irq(EXYNOS5_IRQ_MCT_G0, &mct_comp_event_irq); 263 setup_irq(EXYNOS5_IRQ_MCT_G0, &mct_comp_event_irq);
@@ -404,14 +400,8 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)
404 evt->set_mode = exynos4_tick_set_mode; 400 evt->set_mode = exynos4_tick_set_mode;
405 evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; 401 evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
406 evt->rating = 450; 402 evt->rating = 450;
407 403 clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1),
408 clockevents_calc_mult_shift(evt, clk_rate / (TICK_BASE_CNT + 1), 5); 404 0xf, 0x7fffffff);
409 evt->max_delta_ns =
410 clockevent_delta2ns(0x7fffffff, evt);
411 evt->min_delta_ns =
412 clockevent_delta2ns(0xf, evt);
413
414 clockevents_register_device(evt);
415 405
416 exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET); 406 exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);
417 407