Merge branch 'clocksource/cleanup' into next/cleanup

Clockevent cleanup series from Shawn Guo.

Resolved move/change conflict in mach-pxa/time.c due to the sys_timer
cleanup.

* clocksource/cleanup:
  clocksource: use clockevents_config_and_register() where possible
  ARM: use clockevents_config_and_register() where possible
  clockevents: export clockevents_config_and_register for module use
  + sync to Linux 3.8-rc3

Signed-off-by: Olof Johansson <olof@lixom.net>

Conflicts:
	arch/arm/mach-pxa/time.c

1 files changed, 4 insertions, 14 deletions

diff --git a/arch/arm/mach-exynos/mct.c b/arch/arm/mach-exynos/mct.c
index 4a89b54fcadb..577ee1b03ff4 100644
--- a/arch/arm/mach-exynos/mct.c
+++ b/arch/arm/mach-exynos/mct.c
@@ -255,13 +255,9 @@ static struct irqaction mct_comp_event_irq = {
 
 static void exynos4_clockevent_init(void)
 {
-        clockevents_calc_mult_shift(&mct_comp_device, clk_rate, 5);
-        mct_comp_device.max_delta_ns =
-                clockevent_delta2ns(0xffffffff, &mct_comp_device);
-        mct_comp_device.min_delta_ns =
-                clockevent_delta2ns(0xf, &mct_comp_device);
         mct_comp_device.cpumask = cpumask_of(0);
-        clockevents_register_device(&mct_comp_device);
+        clockevents_config_and_register(&mct_comp_device, clk_rate,
+                                        0xf, 0xffffffff);
 
         if (soc_is_exynos5250())
                 setup_irq(EXYNOS5_IRQ_MCT_G0, &mct_comp_event_irq);
@@ -404,14 +400,8 @@ static int __cpuinit exynos4_local_timer_setup(struct clock_event_device *evt)
         evt->set_mode = exynos4_tick_set_mode;
         evt->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT;
         evt->rating = 450;
-
-        clockevents_calc_mult_shift(evt, clk_rate / (TICK_BASE_CNT + 1), 5);
-        evt->max_delta_ns =
-                clockevent_delta2ns(0x7fffffff, evt);
-        evt->min_delta_ns =
-                clockevent_delta2ns(0xf, evt);
-
-        clockevents_register_device(evt);
+        clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1),
+                                        0xf, 0x7fffffff);
 
         exynos4_mct_write(TICK_BASE_CNT, mevt->base + MCT_L_TCNTB_OFFSET);