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authorKukjin Kim <kgene.kim@samsung.com>2011-11-06 00:54:56 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-11-06 00:54:56 -0400
commit830145796a5c8f1ca3f87ea619063c1d99a57df5 (patch)
treee72a0ecacfcce228c46d93c946cfd65a44cc1fd3 /arch/arm/mach-exynos/mach-origen.c
parente700e41d9abfbf9fee01e979a41b185695132c19 (diff)
ARM: EXYNOS: Add ARCH_EXYNOS and reorganize arch/arm/mach-exynos
The arch/arm/mach-exynos4 directory (CONFIG_ARCH_EXYNOS4) has made for plaforms based on EXYNOS4 SoCs. But since upcoming Samsung's SoCs such as EXYNOS5 (ARM Cortex A15) can reuse most codes in current mach-exynos4, one mach-exynos directory will be used for them. This patch changes to CONFIG_ARCH_EXYNOS (arch/arm/mach-exynos) but keeps original CONFIG_ARCH_EXYNOS4 in mach-exynos/Kconfig to avoid changing in driver side. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/mach-origen.c')
-rw-r--r--arch/arm/mach-exynos/mach-origen.c700
1 files changed, 700 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
new file mode 100644
index 000000000000..f80b563f2be7
--- /dev/null
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -0,0 +1,700 @@
1/* linux/arch/arm/mach-exynos4/mach-origen.c
2 *
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
12#include <linux/gpio.h>
13#include <linux/mmc/host.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/input.h>
17#include <linux/pwm_backlight.h>
18#include <linux/gpio_keys.h>
19#include <linux/i2c.h>
20#include <linux/regulator/machine.h>
21#include <linux/mfd/max8997.h>
22#include <linux/lcd.h>
23
24#include <asm/mach/arch.h>
25#include <asm/mach-types.h>
26
27#include <video/platform_lcd.h>
28
29#include <plat/regs-serial.h>
30#include <plat/regs-fb-v4.h>
31#include <plat/exynos4.h>
32#include <plat/cpu.h>
33#include <plat/devs.h>
34#include <plat/sdhci.h>
35#include <plat/iic.h>
36#include <plat/ehci.h>
37#include <plat/clock.h>
38#include <plat/gpio-cfg.h>
39#include <plat/backlight.h>
40#include <plat/pd.h>
41#include <plat/fb.h>
42#include <plat/mfc.h>
43
44#include <mach/map.h>
45
46/* Following are default values for UCON, ULCON and UFCON UART registers */
47#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
48 S3C2410_UCON_RXILEVEL | \
49 S3C2410_UCON_TXIRQMODE | \
50 S3C2410_UCON_RXIRQMODE | \
51 S3C2410_UCON_RXFIFO_TOI | \
52 S3C2443_UCON_RXERR_IRQEN)
53
54#define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
55
56#define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
57 S5PV210_UFCON_TXTRIG4 | \
58 S5PV210_UFCON_RXTRIG4)
59
60static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
61 [0] = {
62 .hwport = 0,
63 .flags = 0,
64 .ucon = ORIGEN_UCON_DEFAULT,
65 .ulcon = ORIGEN_ULCON_DEFAULT,
66 .ufcon = ORIGEN_UFCON_DEFAULT,
67 },
68 [1] = {
69 .hwport = 1,
70 .flags = 0,
71 .ucon = ORIGEN_UCON_DEFAULT,
72 .ulcon = ORIGEN_ULCON_DEFAULT,
73 .ufcon = ORIGEN_UFCON_DEFAULT,
74 },
75 [2] = {
76 .hwport = 2,
77 .flags = 0,
78 .ucon = ORIGEN_UCON_DEFAULT,
79 .ulcon = ORIGEN_ULCON_DEFAULT,
80 .ufcon = ORIGEN_UFCON_DEFAULT,
81 },
82 [3] = {
83 .hwport = 3,
84 .flags = 0,
85 .ucon = ORIGEN_UCON_DEFAULT,
86 .ulcon = ORIGEN_ULCON_DEFAULT,
87 .ufcon = ORIGEN_UFCON_DEFAULT,
88 },
89};
90
91static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
92 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
93 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
94 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
95};
96static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
97 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
98};
99static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
100 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
101};
102static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
103 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
104 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
105};
106static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
107 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
108};
109static struct regulator_consumer_supply __initdata ldo11_consumer[] = {
110 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
111};
112static struct regulator_consumer_supply __initdata ldo14_consumer[] = {
113 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
114};
115static struct regulator_consumer_supply __initdata ldo17_consumer[] = {
116 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
117};
118static struct regulator_consumer_supply __initdata buck1_consumer[] = {
119 REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
120};
121static struct regulator_consumer_supply __initdata buck2_consumer[] = {
122 REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */
123};
124static struct regulator_consumer_supply __initdata buck3_consumer[] = {
125 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
126};
127static struct regulator_consumer_supply __initdata buck7_consumer[] = {
128 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
129};
130
131static struct regulator_init_data __initdata max8997_ldo1_data = {
132 .constraints = {
133 .name = "VDD_ABB_3.3V",
134 .min_uV = 3300000,
135 .max_uV = 3300000,
136 .apply_uV = 1,
137 .state_mem = {
138 .disabled = 1,
139 },
140 },
141};
142
143static struct regulator_init_data __initdata max8997_ldo2_data = {
144 .constraints = {
145 .name = "VDD_ALIVE_1.1V",
146 .min_uV = 1100000,
147 .max_uV = 1100000,
148 .apply_uV = 1,
149 .always_on = 1,
150 .state_mem = {
151 .enabled = 1,
152 },
153 },
154};
155
156static struct regulator_init_data __initdata max8997_ldo3_data = {
157 .constraints = {
158 .name = "VMIPI_1.1V",
159 .min_uV = 1100000,
160 .max_uV = 1100000,
161 .apply_uV = 1,
162 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
163 .state_mem = {
164 .disabled = 1,
165 },
166 },
167 .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer),
168 .consumer_supplies = ldo3_consumer,
169};
170
171static struct regulator_init_data __initdata max8997_ldo4_data = {
172 .constraints = {
173 .name = "VDD_RTC_1.8V",
174 .min_uV = 1800000,
175 .max_uV = 1800000,
176 .apply_uV = 1,
177 .always_on = 1,
178 .state_mem = {
179 .disabled = 1,
180 },
181 },
182};
183
184static struct regulator_init_data __initdata max8997_ldo6_data = {
185 .constraints = {
186 .name = "VMIPI_1.8V",
187 .min_uV = 1800000,
188 .max_uV = 1800000,
189 .apply_uV = 1,
190 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
191 .state_mem = {
192 .disabled = 1,
193 },
194 },
195 .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer),
196 .consumer_supplies = ldo6_consumer,
197};
198
199static struct regulator_init_data __initdata max8997_ldo7_data = {
200 .constraints = {
201 .name = "VDD_AUD_1.8V",
202 .min_uV = 1800000,
203 .max_uV = 1800000,
204 .apply_uV = 1,
205 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
206 .state_mem = {
207 .disabled = 1,
208 },
209 },
210 .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer),
211 .consumer_supplies = ldo7_consumer,
212};
213
214static struct regulator_init_data __initdata max8997_ldo8_data = {
215 .constraints = {
216 .name = "VADC_3.3V",
217 .min_uV = 3300000,
218 .max_uV = 3300000,
219 .apply_uV = 1,
220 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
221 .state_mem = {
222 .disabled = 1,
223 },
224 },
225 .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer),
226 .consumer_supplies = ldo8_consumer,
227};
228
229static struct regulator_init_data __initdata max8997_ldo9_data = {
230 .constraints = {
231 .name = "DVDD_SWB_2.8V",
232 .min_uV = 2800000,
233 .max_uV = 2800000,
234 .apply_uV = 1,
235 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
236 .state_mem = {
237 .disabled = 1,
238 },
239 },
240 .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer),
241 .consumer_supplies = ldo9_consumer,
242};
243
244static struct regulator_init_data __initdata max8997_ldo10_data = {
245 .constraints = {
246 .name = "VDD_PLL_1.1V",
247 .min_uV = 1100000,
248 .max_uV = 1100000,
249 .apply_uV = 1,
250 .always_on = 1,
251 .state_mem = {
252 .disabled = 1,
253 },
254 },
255};
256
257static struct regulator_init_data __initdata max8997_ldo11_data = {
258 .constraints = {
259 .name = "VDD_AUD_3V",
260 .min_uV = 3000000,
261 .max_uV = 3000000,
262 .apply_uV = 1,
263 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
264 .state_mem = {
265 .disabled = 1,
266 },
267 },
268 .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer),
269 .consumer_supplies = ldo11_consumer,
270};
271
272static struct regulator_init_data __initdata max8997_ldo14_data = {
273 .constraints = {
274 .name = "AVDD18_SWB_1.8V",
275 .min_uV = 1800000,
276 .max_uV = 1800000,
277 .apply_uV = 1,
278 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
279 .state_mem = {
280 .disabled = 1,
281 },
282 },
283 .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer),
284 .consumer_supplies = ldo14_consumer,
285};
286
287static struct regulator_init_data __initdata max8997_ldo17_data = {
288 .constraints = {
289 .name = "VDD_SWB_3.3V",
290 .min_uV = 3300000,
291 .max_uV = 3300000,
292 .apply_uV = 1,
293 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
294 .state_mem = {
295 .disabled = 1,
296 },
297 },
298 .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer),
299 .consumer_supplies = ldo17_consumer,
300};
301
302static struct regulator_init_data __initdata max8997_ldo21_data = {
303 .constraints = {
304 .name = "VDD_MIF_1.2V",
305 .min_uV = 1200000,
306 .max_uV = 1200000,
307 .apply_uV = 1,
308 .always_on = 1,
309 .state_mem = {
310 .disabled = 1,
311 },
312 },
313};
314
315static struct regulator_init_data __initdata max8997_buck1_data = {
316 .constraints = {
317 .name = "VDD_ARM_1.2V",
318 .min_uV = 950000,
319 .max_uV = 1350000,
320 .always_on = 1,
321 .boot_on = 1,
322 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
323 .state_mem = {
324 .disabled = 1,
325 },
326 },
327 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
328 .consumer_supplies = buck1_consumer,
329};
330
331static struct regulator_init_data __initdata max8997_buck2_data = {
332 .constraints = {
333 .name = "VDD_INT_1.1V",
334 .min_uV = 900000,
335 .max_uV = 1100000,
336 .always_on = 1,
337 .boot_on = 1,
338 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
339 .state_mem = {
340 .disabled = 1,
341 },
342 },
343 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
344 .consumer_supplies = buck2_consumer,
345};
346
347static struct regulator_init_data __initdata max8997_buck3_data = {
348 .constraints = {
349 .name = "VDD_G3D_1.1V",
350 .min_uV = 900000,
351 .max_uV = 1100000,
352 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
353 REGULATOR_CHANGE_STATUS,
354 .state_mem = {
355 .disabled = 1,
356 },
357 },
358 .num_consumer_supplies = ARRAY_SIZE(buck3_consumer),
359 .consumer_supplies = buck3_consumer,
360};
361
362static struct regulator_init_data __initdata max8997_buck5_data = {
363 .constraints = {
364 .name = "VDDQ_M1M2_1.2V",
365 .min_uV = 1200000,
366 .max_uV = 1200000,
367 .apply_uV = 1,
368 .always_on = 1,
369 .state_mem = {
370 .disabled = 1,
371 },
372 },
373};
374
375static struct regulator_init_data __initdata max8997_buck7_data = {
376 .constraints = {
377 .name = "VDD_LCD_3.3V",
378 .min_uV = 3300000,
379 .max_uV = 3300000,
380 .boot_on = 1,
381 .apply_uV = 1,
382 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
383 .state_mem = {
384 .disabled = 1
385 },
386 },
387 .num_consumer_supplies = ARRAY_SIZE(buck7_consumer),
388 .consumer_supplies = buck7_consumer,
389};
390
391static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
392 { MAX8997_LDO1, &max8997_ldo1_data },
393 { MAX8997_LDO2, &max8997_ldo2_data },
394 { MAX8997_LDO3, &max8997_ldo3_data },
395 { MAX8997_LDO4, &max8997_ldo4_data },
396 { MAX8997_LDO6, &max8997_ldo6_data },
397 { MAX8997_LDO7, &max8997_ldo7_data },
398 { MAX8997_LDO8, &max8997_ldo8_data },
399 { MAX8997_LDO9, &max8997_ldo9_data },
400 { MAX8997_LDO10, &max8997_ldo10_data },
401 { MAX8997_LDO11, &max8997_ldo11_data },
402 { MAX8997_LDO14, &max8997_ldo14_data },
403 { MAX8997_LDO17, &max8997_ldo17_data },
404 { MAX8997_LDO21, &max8997_ldo21_data },
405 { MAX8997_BUCK1, &max8997_buck1_data },
406 { MAX8997_BUCK2, &max8997_buck2_data },
407 { MAX8997_BUCK3, &max8997_buck3_data },
408 { MAX8997_BUCK5, &max8997_buck5_data },
409 { MAX8997_BUCK7, &max8997_buck7_data },
410};
411
412struct max8997_platform_data __initdata origen_max8997_pdata = {
413 .num_regulators = ARRAY_SIZE(origen_max8997_regulators),
414 .regulators = origen_max8997_regulators,
415
416 .wakeup = true,
417 .buck1_gpiodvs = false,
418 .buck2_gpiodvs = false,
419 .buck5_gpiodvs = false,
420 .irq_base = IRQ_GPIO_END + 1,
421
422 .ignore_gpiodvs_side_effect = true,
423 .buck125_default_idx = 0x0,
424
425 .buck125_gpios[0] = EXYNOS4_GPX0(0),
426 .buck125_gpios[1] = EXYNOS4_GPX0(1),
427 .buck125_gpios[2] = EXYNOS4_GPX0(2),
428
429 .buck1_voltage[0] = 1350000,
430 .buck1_voltage[1] = 1300000,
431 .buck1_voltage[2] = 1250000,
432 .buck1_voltage[3] = 1200000,
433 .buck1_voltage[4] = 1150000,
434 .buck1_voltage[5] = 1100000,
435 .buck1_voltage[6] = 1000000,
436 .buck1_voltage[7] = 950000,
437
438 .buck2_voltage[0] = 1100000,
439 .buck2_voltage[1] = 1100000,
440 .buck2_voltage[2] = 1100000,
441 .buck2_voltage[3] = 1100000,
442 .buck2_voltage[4] = 1000000,
443 .buck2_voltage[5] = 1000000,
444 .buck2_voltage[6] = 1000000,
445 .buck2_voltage[7] = 1000000,
446
447 .buck5_voltage[0] = 1200000,
448 .buck5_voltage[1] = 1200000,
449 .buck5_voltage[2] = 1200000,
450 .buck5_voltage[3] = 1200000,
451 .buck5_voltage[4] = 1200000,
452 .buck5_voltage[5] = 1200000,
453 .buck5_voltage[6] = 1200000,
454 .buck5_voltage[7] = 1200000,
455};
456
457/* I2C0 */
458static struct i2c_board_info i2c0_devs[] __initdata = {
459 {
460 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
461 .platform_data = &origen_max8997_pdata,
462 .irq = IRQ_EINT(4),
463 },
464};
465
466static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
467 .cd_type = S3C_SDHCI_CD_INTERNAL,
468 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
469};
470
471static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
472 .cd_type = S3C_SDHCI_CD_INTERNAL,
473 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
474};
475
476/* USB EHCI */
477static struct s5p_ehci_platdata origen_ehci_pdata;
478
479static void __init origen_ehci_init(void)
480{
481 struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
482
483 s5p_ehci_set_platdata(pdata);
484}
485
486static struct gpio_keys_button origen_gpio_keys_table[] = {
487 {
488 .code = KEY_MENU,
489 .gpio = EXYNOS4_GPX1(5),
490 .desc = "gpio-keys: KEY_MENU",
491 .type = EV_KEY,
492 .active_low = 1,
493 .wakeup = 1,
494 .debounce_interval = 1,
495 }, {
496 .code = KEY_HOME,
497 .gpio = EXYNOS4_GPX1(6),
498 .desc = "gpio-keys: KEY_HOME",
499 .type = EV_KEY,
500 .active_low = 1,
501 .wakeup = 1,
502 .debounce_interval = 1,
503 }, {
504 .code = KEY_BACK,
505 .gpio = EXYNOS4_GPX1(7),
506 .desc = "gpio-keys: KEY_BACK",
507 .type = EV_KEY,
508 .active_low = 1,
509 .wakeup = 1,
510 .debounce_interval = 1,
511 }, {
512 .code = KEY_UP,
513 .gpio = EXYNOS4_GPX2(0),
514 .desc = "gpio-keys: KEY_UP",
515 .type = EV_KEY,
516 .active_low = 1,
517 .wakeup = 1,
518 .debounce_interval = 1,
519 }, {
520 .code = KEY_DOWN,
521 .gpio = EXYNOS4_GPX2(1),
522 .desc = "gpio-keys: KEY_DOWN",
523 .type = EV_KEY,
524 .active_low = 1,
525 .wakeup = 1,
526 .debounce_interval = 1,
527 },
528};
529
530static struct gpio_keys_platform_data origen_gpio_keys_data = {
531 .buttons = origen_gpio_keys_table,
532 .nbuttons = ARRAY_SIZE(origen_gpio_keys_table),
533};
534
535static struct platform_device origen_device_gpiokeys = {
536 .name = "gpio-keys",
537 .dev = {
538 .platform_data = &origen_gpio_keys_data,
539 },
540};
541
542static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power)
543{
544 int ret;
545
546 if (power)
547 ret = gpio_request_one(EXYNOS4_GPE3(4),
548 GPIOF_OUT_INIT_HIGH, "GPE3_4");
549 else
550 ret = gpio_request_one(EXYNOS4_GPE3(4),
551 GPIOF_OUT_INIT_LOW, "GPE3_4");
552
553 gpio_free(EXYNOS4_GPE3(4));
554
555 if (ret)
556 pr_err("failed to request gpio for LCD power: %d\n", ret);
557}
558
559static struct plat_lcd_data origen_lcd_hv070wsa_data = {
560 .set_power = lcd_hv070wsa_set_power,
561};
562
563static struct platform_device origen_lcd_hv070wsa = {
564 .name = "platform-lcd",
565 .dev.parent = &s5p_device_fimd0.dev,
566 .dev.platform_data = &origen_lcd_hv070wsa_data,
567};
568
569static struct s3c_fb_pd_win origen_fb_win0 = {
570 .win_mode = {
571 .left_margin = 64,
572 .right_margin = 16,
573 .upper_margin = 64,
574 .lower_margin = 16,
575 .hsync_len = 48,
576 .vsync_len = 3,
577 .xres = 1024,
578 .yres = 600,
579 },
580 .max_bpp = 32,
581 .default_bpp = 24,
582};
583
584static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
585 .win[0] = &origen_fb_win0,
586 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
587 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
588 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
589};
590
591static struct platform_device *origen_devices[] __initdata = {
592 &s3c_device_hsmmc2,
593 &s3c_device_hsmmc0,
594 &s3c_device_i2c0,
595 &s3c_device_rtc,
596 &s3c_device_wdt,
597 &s5p_device_ehci,
598 &s5p_device_fimc0,
599 &s5p_device_fimc1,
600 &s5p_device_fimc2,
601 &s5p_device_fimc3,
602 &s5p_device_fimd0,
603 &s5p_device_hdmi,
604 &s5p_device_i2c_hdmiphy,
605 &s5p_device_mfc,
606 &s5p_device_mfc_l,
607 &s5p_device_mfc_r,
608 &s5p_device_mixer,
609 &exynos4_device_pd[PD_LCD0],
610 &exynos4_device_pd[PD_TV],
611 &exynos4_device_pd[PD_G3D],
612 &exynos4_device_pd[PD_LCD1],
613 &exynos4_device_pd[PD_CAM],
614 &exynos4_device_pd[PD_GPS],
615 &exynos4_device_pd[PD_MFC],
616 &origen_device_gpiokeys,
617 &origen_lcd_hv070wsa,
618};
619
620/* LCD Backlight data */
621static struct samsung_bl_gpio_info origen_bl_gpio_info = {
622 .no = EXYNOS4_GPD0(0),
623 .func = S3C_GPIO_SFN(2),
624};
625
626static struct platform_pwm_backlight_data origen_bl_data = {
627 .pwm_id = 0,
628 .pwm_period_ns = 1000,
629};
630
631static void s5p_tv_setup(void)
632{
633 /* Direct HPD to HDMI chip */
634 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
635 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
636 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
637}
638
639static void __init origen_map_io(void)
640{
641 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
642 s3c24xx_init_clocks(24000000);
643 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
644}
645
646static void __init origen_power_init(void)
647{
648 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
649 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
650 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE);
651}
652
653static void __init origen_reserve(void)
654{
655 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
656}
657
658static void __init origen_machine_init(void)
659{
660 origen_power_init();
661
662 s3c_i2c0_set_platdata(NULL);
663 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
664
665 /*
666 * Since sdhci instance 2 can contain a bootable media,
667 * sdhci instance 0 is registered after instance 2.
668 */
669 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
670 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
671
672 origen_ehci_init();
673 clk_xusbxti.rate = 24000000;
674
675 s5p_tv_setup();
676 s5p_i2c_hdmiphy_set_platdata(NULL);
677
678 s5p_fimd0_set_platdata(&origen_lcd_pdata);
679
680 platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
681
682 s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
683
684 s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
685 s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
686
687 s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
688
689 samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
690}
691
692MACHINE_START(ORIGEN, "ORIGEN")
693 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
694 .atag_offset = 0x100,
695 .init_irq = exynos4_init_irq,
696 .map_io = origen_map_io,
697 .init_machine = origen_machine_init,
698 .timer = &exynos4_timer,
699 .reserve = &origen_reserve,
700MACHINE_END
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-22 09:20:02 -0500