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authorLinus Torvalds <torvalds@linux-foundation.org>2012-12-14 17:38:28 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-12-14 17:38:28 -0500
commit6a57d104c8cb5b6adad6784b4ce6e2f7f9961a3a (patch)
treec3ff93b006d7483ccee09799d215b03b1bbc3f1b /arch/arm/mach-exynos/mach-exynos5-dt.c
parentcebfa85eb86d92bf85d3b041c6b044184517a988 (diff)
parentc91321e8ff338a88a9272dcd938f085955cd5846 (diff)
Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM Soc updates, take 2, from Olof Johansson: "This is the second batch of SoC updates for the 3.8 merge window, containing parts that had dependencies on earlier branches such that we couldn't include them with the first branch. These are general updates for Samsung Exynos, Renesas/shmobile and a topic branch that adds SMP support to Altera's socfpga platform." Fix up conflicts mostly as per Olof. * tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: EXYNOS: Clock settings for SATA and SATA PHY ARM: EXYNOS: Add ARM down clock support ARM: EXYNOS: Fix i2c suspend/resume for legacy controller ARM: EXYNOS: Add aliases for i2c controller ARM: EXYNOS: Setup legacy i2c controller interrupts sh: clkfwk: fixup unsed variable warning Revert "ARM: shmobile: r8a7779: Replace modify_scu_cpu_psr with scu_power_mode" Revert "ARM: shmobile: sh73a0: Replace modify_scu_cpu_psr with scu_power_mode" Revert "ARM: shmobile: emev2: Replace modify_scu_cpu_psr with scu_power_mode" ARM: highbank: use common debug_ll_io_init ARM: shmobile: sh7372: sh7372_fsiXck_clk become non-global ARM: shmobile: sh7372: remove fsidivx clock ARM: socfpga: mark secondary_trampoline as cpuinit socfpga: map uart into virtual address space so that early_printk() works ARM: socfpga: fix build break for allyesconfig ARM: socfpga: Enable SMP for socfpga ARM: EXYNOS: Add dp clock support for EXYNOS5 ARM: SAMSUNG: call clk_get_rate for debugfs rate files ARM: SAMSUNG: add clock_tree debugfs file in clock
Diffstat (limited to 'arch/arm/mach-exynos/mach-exynos5-dt.c')
-rw-r--r--arch/arm/mach-exynos/mach-exynos5-dt.c25
1 files changed, 24 insertions, 1 deletions
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 929de766d490..f038c8cadca4 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -13,11 +13,12 @@
13#include <linux/of_fdt.h> 13#include <linux/of_fdt.h>
14#include <linux/serial_core.h> 14#include <linux/serial_core.h>
15#include <linux/memblock.h> 15#include <linux/memblock.h>
16#include <linux/of_fdt.h> 16#include <linux/io.h>
17 17
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19#include <asm/hardware/gic.h> 19#include <asm/hardware/gic.h>
20#include <mach/map.h> 20#include <mach/map.h>
21#include <mach/regs-pmu.h>
21 22
22#include <plat/cpu.h> 23#include <plat/cpu.h>
23#include <plat/regs-serial.h> 24#include <plat/regs-serial.h>
@@ -124,6 +125,28 @@ static void __init exynos5_dt_map_io(void)
124 125
125static void __init exynos5_dt_machine_init(void) 126static void __init exynos5_dt_machine_init(void)
126{ 127{
128 struct device_node *i2c_np;
129 const char *i2c_compat = "samsung,s3c2440-i2c";
130 unsigned int tmp;
131
132 /*
133 * Exynos5's legacy i2c controller and new high speed i2c
134 * controller have muxed interrupt sources. By default the
135 * interrupts for 4-channel HS-I2C controller are enabled.
136 * If node for first four channels of legacy i2c controller
137 * are available then re-configure the interrupts via the
138 * system register.
139 */
140 for_each_compatible_node(i2c_np, NULL, i2c_compat) {
141 if (of_device_is_available(i2c_np)) {
142 if (of_alias_get_id(i2c_np, "i2c") < 4) {
143 tmp = readl(EXYNOS5_SYS_I2C_CFG);
144 writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")),
145 EXYNOS5_SYS_I2C_CFG);
146 }
147 }
148 }
149
127 if (of_machine_is_compatible("samsung,exynos5250")) 150 if (of_machine_is_compatible("samsung,exynos5250"))
128 of_platform_populate(NULL, of_default_bus_match_table, 151 of_platform_populate(NULL, of_default_bus_match_table,
129 exynos5250_auxdata_lookup, NULL); 152 exynos5250_auxdata_lookup, NULL);