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authorAmit Daniel Kachhap <amit.daniel@samsung.com>2012-10-29 08:18:01 -0400
committerKukjin Kim <kgene.kim@samsung.com>2012-10-29 08:18:01 -0400
commit8d4155dbb184f02c08bd36c5120f2b4dc4f14860 (patch)
tree424bb818a999cdfb96f3e9f906d8e9ac3808108e /arch/arm/mach-exynos/include
parent2eae613b95a786714bd1b5825ea3abc78d229d3f (diff)
ARM: EXYNOS: Add devicetree node for TMU driver for exynos4
This patch adds necessary source definations needed for TMU driver and adds devicetree node for exynos4210. Signed-off-by: Amit Daniel Kachhap <amit.daniel@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/include')
-rw-r--r--arch/arm/mach-exynos/include/mach/irqs.h3
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h2
2 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index 35bced6f9092..5adacd12e43b 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -136,6 +136,9 @@
136#define EXYNOS4_IRQ_TSI IRQ_SPI(115) 136#define EXYNOS4_IRQ_TSI IRQ_SPI(115)
137#define EXYNOS4_IRQ_SATA IRQ_SPI(116) 137#define EXYNOS4_IRQ_SATA IRQ_SPI(116)
138 138
139#define EXYNOS4_IRQ_TMU_TRIG0 COMBINER_IRQ(2, 4)
140#define EXYNOS4_IRQ_TMU_TRIG1 COMBINER_IRQ(3, 4)
141
139#define EXYNOS4_IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0) 142#define EXYNOS4_IRQ_SYSMMU_MDMA0_0 COMBINER_IRQ(4, 0)
140#define EXYNOS4_IRQ_SYSMMU_SSS_0 COMBINER_IRQ(4, 1) 143#define EXYNOS4_IRQ_SYSMMU_SSS_0 COMBINER_IRQ(4, 1)
141#define EXYNOS4_IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2) 144#define EXYNOS4_IRQ_SYSMMU_FIMC0_0 COMBINER_IRQ(4, 2)
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 8480849affb9..772acd344cbd 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -88,6 +88,8 @@
88#define EXYNOS4_PA_TWD 0x10500600 88#define EXYNOS4_PA_TWD 0x10500600
89#define EXYNOS4_PA_L2CC 0x10502000 89#define EXYNOS4_PA_L2CC 0x10502000
90 90
91#define EXYNOS4_PA_TMU 0x100C0000
92
91#define EXYNOS4_PA_MDMA0 0x10810000 93#define EXYNOS4_PA_MDMA0 0x10810000
92#define EXYNOS4_PA_MDMA1 0x12850000 94#define EXYNOS4_PA_MDMA1 0x12850000
93#define EXYNOS4_PA_PDMA0 0x12680000 95#define EXYNOS4_PA_PDMA0 0x12680000