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authorLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 17:39:22 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 17:39:22 -0500
commit2ac9d7aaccbd598b5bd19ac40761b723bb675442 (patch)
tree09132a44e33798aaa5e80f10bf025b510015cab3 /arch/arm/mach-exynos/include/mach/map.h
parent5ede3ceb7b2c2843e153a1803edbdc8c56655950 (diff)
parentdcf7ec5ee62a78123057a1e286c88ca739717409 (diff)
Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Driver specific changes Again, a lot of platforms have changes in here: pxa, samsung, omap, at91, imx, ... * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits) ARM: sa1100: clean up of the clock support ARM: pxa: add dummy clock for sa1100-rtc RTC: sa1100: support sa1100, pxa and mmp soc families RTC: sa1100: remove redundant code of setting alarm RTC: sa1100: Clean out ost register Input: zylonite-wm97xx - replace IRQ_GPIO() with gpio_to_irq() pcmcia: pxa: replace IRQ_GPIO() with gpio_to_irq() ARM: EXYNOS: Modified files for SPI consolidation work ARM: S5P64X0: Enable SDHCI support ARM: S5P64X0: Add lookup of sdhci-s3c clocks using generic names ARM: S5P64X0: Add HSMMC setup for host Controller ARM: EXYNOS: Add USB OHCI support to ORIGEN board USB: Add Samsung Exynos OHCI diver ARM: EXYNOS: Add USB OHCI support to SMDKV310 board ARM: EXYNOS: Add USB OHCI device net: macb: fix build break with !CONFIG_OF i2c: tegra: Support DVC controller in device tree i2c: tegra: Add __devinit/exit to probe/remove net/at91_ether: use gpio_is_valid for phy IRQ line ARM: at91/net: add macb ethernet controller in 9g45/9g20 DT ...
Diffstat (limited to 'arch/arm/mach-exynos/include/mach/map.h')
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index d1829860a0ec..c754a22a2bb3 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -87,6 +87,10 @@
87#define EXYNOS4_PA_SYSMMU_TV 0x12E20000 87#define EXYNOS4_PA_SYSMMU_TV 0x12E20000
88#define EXYNOS4_PA_SYSMMU_MFC_L 0x13620000 88#define EXYNOS4_PA_SYSMMU_MFC_L 0x13620000
89#define EXYNOS4_PA_SYSMMU_MFC_R 0x13630000 89#define EXYNOS4_PA_SYSMMU_MFC_R 0x13630000
90#define EXYNOS4_PA_SPI0 0x13920000
91#define EXYNOS4_PA_SPI1 0x13930000
92#define EXYNOS4_PA_SPI2 0x13940000
93
90 94
91#define EXYNOS4_PA_GPIO1 0x11400000 95#define EXYNOS4_PA_GPIO1 0x11400000
92#define EXYNOS4_PA_GPIO2 0x11000000 96#define EXYNOS4_PA_GPIO2 0x11000000
@@ -107,6 +111,7 @@
107#define EXYNOS4_PA_SROMC 0x12570000 111#define EXYNOS4_PA_SROMC 0x12570000
108 112
109#define EXYNOS4_PA_EHCI 0x12580000 113#define EXYNOS4_PA_EHCI 0x12580000
114#define EXYNOS4_PA_OHCI 0x12590000
110#define EXYNOS4_PA_HSPHY 0x125B0000 115#define EXYNOS4_PA_HSPHY 0x125B0000
111#define EXYNOS4_PA_MFC 0x13400000 116#define EXYNOS4_PA_MFC 0x13400000
112 117
@@ -148,6 +153,9 @@
148#define S3C_PA_RTC EXYNOS4_PA_RTC 153#define S3C_PA_RTC EXYNOS4_PA_RTC
149#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG 154#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG
150#define S3C_PA_UART EXYNOS4_PA_UART 155#define S3C_PA_UART EXYNOS4_PA_UART
156#define S3C_PA_SPI0 EXYNOS4_PA_SPI0
157#define S3C_PA_SPI1 EXYNOS4_PA_SPI1
158#define S3C_PA_SPI2 EXYNOS4_PA_SPI2
151 159
152#define S5P_PA_EHCI EXYNOS4_PA_EHCI 160#define S5P_PA_EHCI EXYNOS4_PA_EHCI
153#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 161#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0