diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2012-05-15 02:55:25 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2012-05-15 02:55:25 -0400 |
commit | 0f58487b1e313e6abf500431e05f4d54f61736f2 (patch) | |
tree | 6e4e093e548c168c2a90330a08d33cd43240f13d /arch/arm/mach-exynos/include/mach/irqs.h | |
parent | 36be50515fe2aef61533b516fa2576a2c7fe7664 (diff) | |
parent | 199642bfe107c411f25fbfc16c9fd49cfef9785d (diff) |
Merge branch 'next/cleanup-plat-s5p' into next/devel-exynos5250-1
Diffstat (limited to 'arch/arm/mach-exynos/include/mach/irqs.h')
-rw-r--r-- | arch/arm/mach-exynos/include/mach/irqs.h | 25 |
1 files changed, 7 insertions, 18 deletions
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h index 591e78521a9f..116167524051 100644 --- a/arch/arm/mach-exynos/include/mach/irqs.h +++ b/arch/arm/mach-exynos/include/mach/irqs.h | |||
@@ -154,6 +154,13 @@ | |||
154 | #define EXYNOS4_IRQ_SYSMMU_MFC_M1_0 COMBINER_IRQ(5, 6) | 154 | #define EXYNOS4_IRQ_SYSMMU_MFC_M1_0 COMBINER_IRQ(5, 6) |
155 | #define EXYNOS4_IRQ_SYSMMU_PCIE_0 COMBINER_IRQ(5, 7) | 155 | #define EXYNOS4_IRQ_SYSMMU_PCIE_0 COMBINER_IRQ(5, 7) |
156 | 156 | ||
157 | #define EXYNOS4_IRQ_SYSMMU_FIMC_LITE0_0 COMBINER_IRQ(16, 0) | ||
158 | #define EXYNOS4_IRQ_SYSMMU_FIMC_LITE1_0 COMBINER_IRQ(16, 1) | ||
159 | #define EXYNOS4_IRQ_SYSMMU_FIMC_ISP_0 COMBINER_IRQ(16, 2) | ||
160 | #define EXYNOS4_IRQ_SYSMMU_FIMC_DRC_0 COMBINER_IRQ(16, 3) | ||
161 | #define EXYNOS4_IRQ_SYSMMU_FIMC_FD_0 COMBINER_IRQ(16, 4) | ||
162 | #define EXYNOS4_IRQ_SYSMMU_FIMC_CX_0 COMBINER_IRQ(16, 5) | ||
163 | |||
157 | #define EXYNOS4_IRQ_FIMD0_FIFO COMBINER_IRQ(11, 0) | 164 | #define EXYNOS4_IRQ_FIMD0_FIFO COMBINER_IRQ(11, 0) |
158 | #define EXYNOS4_IRQ_FIMD0_VSYNC COMBINER_IRQ(11, 1) | 165 | #define EXYNOS4_IRQ_FIMD0_VSYNC COMBINER_IRQ(11, 1) |
159 | #define EXYNOS4_IRQ_FIMD0_SYSTEM COMBINER_IRQ(11, 2) | 166 | #define EXYNOS4_IRQ_FIMD0_SYSTEM COMBINER_IRQ(11, 2) |
@@ -220,24 +227,6 @@ | |||
220 | #define IRQ_KEYPAD EXYNOS4_IRQ_KEYPAD | 227 | #define IRQ_KEYPAD EXYNOS4_IRQ_KEYPAD |
221 | #define IRQ_PMU EXYNOS4_IRQ_PMU | 228 | #define IRQ_PMU EXYNOS4_IRQ_PMU |
222 | 229 | ||
223 | #define IRQ_SYSMMU_MDMA0_0 EXYNOS4_IRQ_SYSMMU_MDMA0_0 | ||
224 | #define IRQ_SYSMMU_SSS_0 EXYNOS4_IRQ_SYSMMU_SSS_0 | ||
225 | #define IRQ_SYSMMU_FIMC0_0 EXYNOS4_IRQ_SYSMMU_FIMC0_0 | ||
226 | #define IRQ_SYSMMU_FIMC1_0 EXYNOS4_IRQ_SYSMMU_FIMC1_0 | ||
227 | #define IRQ_SYSMMU_FIMC2_0 EXYNOS4_IRQ_SYSMMU_FIMC2_0 | ||
228 | #define IRQ_SYSMMU_FIMC3_0 EXYNOS4_IRQ_SYSMMU_FIMC3_0 | ||
229 | #define IRQ_SYSMMU_JPEG_0 EXYNOS4_IRQ_SYSMMU_JPEG_0 | ||
230 | #define IRQ_SYSMMU_2D_0 EXYNOS4_IRQ_SYSMMU_2D_0 | ||
231 | |||
232 | #define IRQ_SYSMMU_ROTATOR_0 EXYNOS4_IRQ_SYSMMU_ROTATOR_0 | ||
233 | #define IRQ_SYSMMU_MDMA1_0 EXYNOS4_IRQ_SYSMMU_MDMA1_0 | ||
234 | #define IRQ_SYSMMU_LCD0_M0_0 EXYNOS4_IRQ_SYSMMU_LCD0_M0_0 | ||
235 | #define IRQ_SYSMMU_LCD1_M1_0 EXYNOS4_IRQ_SYSMMU_LCD1_M1_0 | ||
236 | #define IRQ_SYSMMU_TV_M0_0 EXYNOS4_IRQ_SYSMMU_TV_M0_0 | ||
237 | #define IRQ_SYSMMU_MFC_M0_0 EXYNOS4_IRQ_SYSMMU_MFC_M0_0 | ||
238 | #define IRQ_SYSMMU_MFC_M1_0 EXYNOS4_IRQ_SYSMMU_MFC_M1_0 | ||
239 | #define IRQ_SYSMMU_PCIE_0 EXYNOS4_IRQ_SYSMMU_PCIE_0 | ||
240 | |||
241 | #define IRQ_FIMD0_FIFO EXYNOS4_IRQ_FIMD0_FIFO | 230 | #define IRQ_FIMD0_FIFO EXYNOS4_IRQ_FIMD0_FIFO |
242 | #define IRQ_FIMD0_VSYNC EXYNOS4_IRQ_FIMD0_VSYNC | 231 | #define IRQ_FIMD0_VSYNC EXYNOS4_IRQ_FIMD0_VSYNC |
243 | #define IRQ_FIMD0_SYSTEM EXYNOS4_IRQ_FIMD0_SYSTEM | 232 | #define IRQ_FIMD0_SYSTEM EXYNOS4_IRQ_FIMD0_SYSTEM |