diff options
author | Sangsu Park <sangsu4u.park@samsung.com> | 2012-03-12 19:23:33 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2012-03-14 09:51:20 -0400 |
commit | bcdc87b594e779b6aa753c912fa4a14942edb01e (patch) | |
tree | 5b8ab626edadaeb947d5d930c70bcbe602ab840b /arch/arm/mach-exynos/include/mach/gpio.h | |
parent | fde7d9049e55ab85a390be7f415d74c9f62dd0f9 (diff) |
ARM: EXYNOS: add support GPIO for EXYNOS5250
This patch adds support regarding GPIO definitions for
EXYNOS5250 and change the macro of GPIO numbering to use
EXYNOS4 and EXYNOS5 SoCs.
Signed-off-by: Sangsu Park <sangsu4u.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/include/mach/gpio.h')
-rw-r--r-- | arch/arm/mach-exynos/include/mach/gpio.h | 239 |
1 files changed, 188 insertions, 51 deletions
diff --git a/arch/arm/mach-exynos/include/mach/gpio.h b/arch/arm/mach-exynos/include/mach/gpio.h index 80523ca9bb49..d7498afe036a 100644 --- a/arch/arm/mach-exynos/include/mach/gpio.h +++ b/arch/arm/mach-exynos/include/mach/gpio.h | |||
@@ -1,9 +1,8 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/include/mach/gpio.h | 1 | /* |
2 | * | 2 | * Copyright (c) 2010-2012 Samsung Electronics Co., Ltd. |
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | 3 | * http://www.samsung.com |
5 | * | 4 | * |
6 | * EXYNOS4 - GPIO lib support | 5 | * EXYNOS - GPIO lib support |
7 | * | 6 | * |
8 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License version 2 as | 8 | * it under the terms of the GNU General Public License version 2 as |
@@ -13,9 +12,13 @@ | |||
13 | #ifndef __ASM_ARCH_GPIO_H | 12 | #ifndef __ASM_ARCH_GPIO_H |
14 | #define __ASM_ARCH_GPIO_H __FILE__ | 13 | #define __ASM_ARCH_GPIO_H __FILE__ |
15 | 14 | ||
16 | /* Practically, GPIO banks up to GPZ are the configurable gpio banks */ | 15 | /* Macro for EXYNOS GPIO numbering */ |
16 | |||
17 | #define EXYNOS_GPIO_NEXT(__gpio) \ | ||
18 | ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) | ||
19 | |||
20 | /* EXYNOS4 GPIO bank sizes */ | ||
17 | 21 | ||
18 | /* GPIO bank sizes */ | ||
19 | #define EXYNOS4_GPIO_A0_NR (8) | 22 | #define EXYNOS4_GPIO_A0_NR (8) |
20 | #define EXYNOS4_GPIO_A1_NR (6) | 23 | #define EXYNOS4_GPIO_A1_NR (6) |
21 | #define EXYNOS4_GPIO_B_NR (8) | 24 | #define EXYNOS4_GPIO_B_NR (8) |
@@ -54,52 +57,50 @@ | |||
54 | #define EXYNOS4_GPIO_Y6_NR (8) | 57 | #define EXYNOS4_GPIO_Y6_NR (8) |
55 | #define EXYNOS4_GPIO_Z_NR (7) | 58 | #define EXYNOS4_GPIO_Z_NR (7) |
56 | 59 | ||
57 | /* GPIO bank numbers */ | 60 | /* EXYNOS4 GPIO bank numbers */ |
58 | |||
59 | #define EXYNOS4_GPIO_NEXT(__gpio) \ | ||
60 | ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1) | ||
61 | 61 | ||
62 | enum s5p_gpio_number { | 62 | enum exynos4_gpio_number { |
63 | EXYNOS4_GPIO_A0_START = 0, | 63 | EXYNOS4_GPIO_A0_START = 0, |
64 | EXYNOS4_GPIO_A1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_A0), | 64 | EXYNOS4_GPIO_A1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_A0), |
65 | EXYNOS4_GPIO_B_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_A1), | 65 | EXYNOS4_GPIO_B_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_A1), |
66 | EXYNOS4_GPIO_C0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_B), | 66 | EXYNOS4_GPIO_C0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_B), |
67 | EXYNOS4_GPIO_C1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_C0), | 67 | EXYNOS4_GPIO_C1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C0), |
68 | EXYNOS4_GPIO_D0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_C1), | 68 | EXYNOS4_GPIO_D0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_C1), |
69 | EXYNOS4_GPIO_D1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_D0), | 69 | EXYNOS4_GPIO_D1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D0), |
70 | EXYNOS4_GPIO_E0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_D1), | 70 | EXYNOS4_GPIO_E0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_D1), |
71 | EXYNOS4_GPIO_E1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_E0), | 71 | EXYNOS4_GPIO_E1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E0), |
72 | EXYNOS4_GPIO_E2_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_E1), | 72 | EXYNOS4_GPIO_E2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E1), |
73 | EXYNOS4_GPIO_E3_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_E2), | 73 | EXYNOS4_GPIO_E3_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E2), |
74 | EXYNOS4_GPIO_E4_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_E3), | 74 | EXYNOS4_GPIO_E4_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E3), |
75 | EXYNOS4_GPIO_F0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_E4), | 75 | EXYNOS4_GPIO_F0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_E4), |
76 | EXYNOS4_GPIO_F1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_F0), | 76 | EXYNOS4_GPIO_F1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F0), |
77 | EXYNOS4_GPIO_F2_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_F1), | 77 | EXYNOS4_GPIO_F2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F1), |
78 | EXYNOS4_GPIO_F3_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_F2), | 78 | EXYNOS4_GPIO_F3_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F2), |
79 | EXYNOS4_GPIO_J0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_F3), | 79 | EXYNOS4_GPIO_J0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_F3), |
80 | EXYNOS4_GPIO_J1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_J0), | 80 | EXYNOS4_GPIO_J1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_J0), |
81 | EXYNOS4_GPIO_K0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_J1), | 81 | EXYNOS4_GPIO_K0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_J1), |
82 | EXYNOS4_GPIO_K1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_K0), | 82 | EXYNOS4_GPIO_K1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K0), |
83 | EXYNOS4_GPIO_K2_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_K1), | 83 | EXYNOS4_GPIO_K2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K1), |
84 | EXYNOS4_GPIO_K3_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_K2), | 84 | EXYNOS4_GPIO_K3_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K2), |
85 | EXYNOS4_GPIO_L0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_K3), | 85 | EXYNOS4_GPIO_L0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_K3), |
86 | EXYNOS4_GPIO_L1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_L0), | 86 | EXYNOS4_GPIO_L1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_L0), |
87 | EXYNOS4_GPIO_L2_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_L1), | 87 | EXYNOS4_GPIO_L2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_L1), |
88 | EXYNOS4_GPIO_X0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_L2), | 88 | EXYNOS4_GPIO_X0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_L2), |
89 | EXYNOS4_GPIO_X1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X0), | 89 | EXYNOS4_GPIO_X1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X0), |
90 | EXYNOS4_GPIO_X2_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X1), | 90 | EXYNOS4_GPIO_X2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X1), |
91 | EXYNOS4_GPIO_X3_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X2), | 91 | EXYNOS4_GPIO_X3_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X2), |
92 | EXYNOS4_GPIO_Y0_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_X3), | 92 | EXYNOS4_GPIO_Y0_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_X3), |
93 | EXYNOS4_GPIO_Y1_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y0), | 93 | EXYNOS4_GPIO_Y1_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y0), |
94 | EXYNOS4_GPIO_Y2_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y1), | 94 | EXYNOS4_GPIO_Y2_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y1), |
95 | EXYNOS4_GPIO_Y3_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y2), | 95 | EXYNOS4_GPIO_Y3_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y2), |
96 | EXYNOS4_GPIO_Y4_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y3), | 96 | EXYNOS4_GPIO_Y4_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y3), |
97 | EXYNOS4_GPIO_Y5_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y4), | 97 | EXYNOS4_GPIO_Y5_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y4), |
98 | EXYNOS4_GPIO_Y6_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y5), | 98 | EXYNOS4_GPIO_Y6_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y5), |
99 | EXYNOS4_GPIO_Z_START = EXYNOS4_GPIO_NEXT(EXYNOS4_GPIO_Y6), | 99 | EXYNOS4_GPIO_Z_START = EXYNOS_GPIO_NEXT(EXYNOS4_GPIO_Y6), |
100 | }; | 100 | }; |
101 | 101 | ||
102 | /* EXYNOS4 GPIO number definitions */ | 102 | /* EXYNOS4 GPIO number definitions */ |
103 | |||
103 | #define EXYNOS4_GPA0(_nr) (EXYNOS4_GPIO_A0_START + (_nr)) | 104 | #define EXYNOS4_GPA0(_nr) (EXYNOS4_GPIO_A0_START + (_nr)) |
104 | #define EXYNOS4_GPA1(_nr) (EXYNOS4_GPIO_A1_START + (_nr)) | 105 | #define EXYNOS4_GPA1(_nr) (EXYNOS4_GPIO_A1_START + (_nr)) |
105 | #define EXYNOS4_GPB(_nr) (EXYNOS4_GPIO_B_START + (_nr)) | 106 | #define EXYNOS4_GPB(_nr) (EXYNOS4_GPIO_B_START + (_nr)) |
@@ -139,11 +140,147 @@ enum s5p_gpio_number { | |||
139 | #define EXYNOS4_GPZ(_nr) (EXYNOS4_GPIO_Z_START + (_nr)) | 140 | #define EXYNOS4_GPZ(_nr) (EXYNOS4_GPIO_Z_START + (_nr)) |
140 | 141 | ||
141 | /* the end of the EXYNOS4 specific gpios */ | 142 | /* the end of the EXYNOS4 specific gpios */ |
143 | |||
142 | #define EXYNOS4_GPIO_END (EXYNOS4_GPZ(EXYNOS4_GPIO_Z_NR) + 1) | 144 | #define EXYNOS4_GPIO_END (EXYNOS4_GPZ(EXYNOS4_GPIO_Z_NR) + 1) |
143 | #define S3C_GPIO_END EXYNOS4_GPIO_END | ||
144 | 145 | ||
145 | /* define the number of gpios we need to the one after the GPZ() range */ | 146 | /* EXYNOS5 GPIO bank sizes */ |
146 | #define ARCH_NR_GPIOS (EXYNOS4_GPZ(EXYNOS4_GPIO_Z_NR) + \ | 147 | |
147 | CONFIG_SAMSUNG_GPIO_EXTRA + 1) | 148 | #define EXYNOS5_GPIO_A0_NR (8) |
149 | #define EXYNOS5_GPIO_A1_NR (6) | ||
150 | #define EXYNOS5_GPIO_A2_NR (8) | ||
151 | #define EXYNOS5_GPIO_B0_NR (5) | ||
152 | #define EXYNOS5_GPIO_B1_NR (5) | ||
153 | #define EXYNOS5_GPIO_B2_NR (4) | ||
154 | #define EXYNOS5_GPIO_B3_NR (4) | ||
155 | #define EXYNOS5_GPIO_C0_NR (7) | ||
156 | #define EXYNOS5_GPIO_C1_NR (7) | ||
157 | #define EXYNOS5_GPIO_C2_NR (7) | ||
158 | #define EXYNOS5_GPIO_C3_NR (7) | ||
159 | #define EXYNOS5_GPIO_D0_NR (8) | ||
160 | #define EXYNOS5_GPIO_D1_NR (8) | ||
161 | #define EXYNOS5_GPIO_Y0_NR (6) | ||
162 | #define EXYNOS5_GPIO_Y1_NR (4) | ||
163 | #define EXYNOS5_GPIO_Y2_NR (6) | ||
164 | #define EXYNOS5_GPIO_Y3_NR (8) | ||
165 | #define EXYNOS5_GPIO_Y4_NR (8) | ||
166 | #define EXYNOS5_GPIO_Y5_NR (8) | ||
167 | #define EXYNOS5_GPIO_Y6_NR (8) | ||
168 | #define EXYNOS5_GPIO_X0_NR (8) | ||
169 | #define EXYNOS5_GPIO_X1_NR (8) | ||
170 | #define EXYNOS5_GPIO_X2_NR (8) | ||
171 | #define EXYNOS5_GPIO_X3_NR (8) | ||
172 | #define EXYNOS5_GPIO_E0_NR (8) | ||
173 | #define EXYNOS5_GPIO_E1_NR (2) | ||
174 | #define EXYNOS5_GPIO_F0_NR (4) | ||
175 | #define EXYNOS5_GPIO_F1_NR (4) | ||
176 | #define EXYNOS5_GPIO_G0_NR (8) | ||
177 | #define EXYNOS5_GPIO_G1_NR (8) | ||
178 | #define EXYNOS5_GPIO_G2_NR (2) | ||
179 | #define EXYNOS5_GPIO_H0_NR (4) | ||
180 | #define EXYNOS5_GPIO_H1_NR (8) | ||
181 | #define EXYNOS5_GPIO_V0_NR (8) | ||
182 | #define EXYNOS5_GPIO_V1_NR (8) | ||
183 | #define EXYNOS5_GPIO_V2_NR (8) | ||
184 | #define EXYNOS5_GPIO_V3_NR (8) | ||
185 | #define EXYNOS5_GPIO_V4_NR (2) | ||
186 | #define EXYNOS5_GPIO_Z_NR (7) | ||
187 | |||
188 | /* EXYNOS5 GPIO bank numbers */ | ||
189 | |||
190 | enum exynos5_gpio_number { | ||
191 | EXYNOS5_GPIO_A0_START = 0, | ||
192 | EXYNOS5_GPIO_A1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_A0), | ||
193 | EXYNOS5_GPIO_A2_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_A1), | ||
194 | EXYNOS5_GPIO_B0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_A2), | ||
195 | EXYNOS5_GPIO_B1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_B0), | ||
196 | EXYNOS5_GPIO_B2_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_B1), | ||
197 | EXYNOS5_GPIO_B3_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_B2), | ||
198 | EXYNOS5_GPIO_C0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_B3), | ||
199 | EXYNOS5_GPIO_C1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C0), | ||
200 | EXYNOS5_GPIO_C2_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C1), | ||
201 | EXYNOS5_GPIO_C3_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C2), | ||
202 | EXYNOS5_GPIO_D0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_C3), | ||
203 | EXYNOS5_GPIO_D1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_D0), | ||
204 | EXYNOS5_GPIO_Y0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_D1), | ||
205 | EXYNOS5_GPIO_Y1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y0), | ||
206 | EXYNOS5_GPIO_Y2_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y1), | ||
207 | EXYNOS5_GPIO_Y3_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y2), | ||
208 | EXYNOS5_GPIO_Y4_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y3), | ||
209 | EXYNOS5_GPIO_Y5_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y4), | ||
210 | EXYNOS5_GPIO_Y6_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y5), | ||
211 | EXYNOS5_GPIO_X0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_Y6), | ||
212 | EXYNOS5_GPIO_X1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_X0), | ||
213 | EXYNOS5_GPIO_X2_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_X1), | ||
214 | EXYNOS5_GPIO_X3_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_X2), | ||
215 | EXYNOS5_GPIO_E0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_X3), | ||
216 | EXYNOS5_GPIO_E1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_E0), | ||
217 | EXYNOS5_GPIO_F0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_E1), | ||
218 | EXYNOS5_GPIO_F1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_F0), | ||
219 | EXYNOS5_GPIO_G0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_F1), | ||
220 | EXYNOS5_GPIO_G1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_G0), | ||
221 | EXYNOS5_GPIO_G2_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_G1), | ||
222 | EXYNOS5_GPIO_H0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_G2), | ||
223 | EXYNOS5_GPIO_H1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_H0), | ||
224 | EXYNOS5_GPIO_V0_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_H1), | ||
225 | EXYNOS5_GPIO_V1_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V0), | ||
226 | EXYNOS5_GPIO_V2_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V1), | ||
227 | EXYNOS5_GPIO_V3_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V2), | ||
228 | EXYNOS5_GPIO_V4_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V3), | ||
229 | EXYNOS5_GPIO_Z_START = EXYNOS_GPIO_NEXT(EXYNOS5_GPIO_V4), | ||
230 | }; | ||
231 | |||
232 | /* EXYNOS5 GPIO number definitions */ | ||
233 | |||
234 | #define EXYNOS5_GPA0(_nr) (EXYNOS5_GPIO_A0_START + (_nr)) | ||
235 | #define EXYNOS5_GPA1(_nr) (EXYNOS5_GPIO_A1_START + (_nr)) | ||
236 | #define EXYNOS5_GPA2(_nr) (EXYNOS5_GPIO_A2_START + (_nr)) | ||
237 | #define EXYNOS5_GPB0(_nr) (EXYNOS5_GPIO_B0_START + (_nr)) | ||
238 | #define EXYNOS5_GPB1(_nr) (EXYNOS5_GPIO_B1_START + (_nr)) | ||
239 | #define EXYNOS5_GPB2(_nr) (EXYNOS5_GPIO_B2_START + (_nr)) | ||
240 | #define EXYNOS5_GPB3(_nr) (EXYNOS5_GPIO_B3_START + (_nr)) | ||
241 | #define EXYNOS5_GPC0(_nr) (EXYNOS5_GPIO_C0_START + (_nr)) | ||
242 | #define EXYNOS5_GPC1(_nr) (EXYNOS5_GPIO_C1_START + (_nr)) | ||
243 | #define EXYNOS5_GPC2(_nr) (EXYNOS5_GPIO_C2_START + (_nr)) | ||
244 | #define EXYNOS5_GPC3(_nr) (EXYNOS5_GPIO_C3_START + (_nr)) | ||
245 | #define EXYNOS5_GPD0(_nr) (EXYNOS5_GPIO_D0_START + (_nr)) | ||
246 | #define EXYNOS5_GPD1(_nr) (EXYNOS5_GPIO_D1_START + (_nr)) | ||
247 | #define EXYNOS5_GPY0(_nr) (EXYNOS5_GPIO_Y0_START + (_nr)) | ||
248 | #define EXYNOS5_GPY1(_nr) (EXYNOS5_GPIO_Y1_START + (_nr)) | ||
249 | #define EXYNOS5_GPY2(_nr) (EXYNOS5_GPIO_Y2_START + (_nr)) | ||
250 | #define EXYNOS5_GPY3(_nr) (EXYNOS5_GPIO_Y3_START + (_nr)) | ||
251 | #define EXYNOS5_GPY4(_nr) (EXYNOS5_GPIO_Y4_START + (_nr)) | ||
252 | #define EXYNOS5_GPY5(_nr) (EXYNOS5_GPIO_Y5_START + (_nr)) | ||
253 | #define EXYNOS5_GPY6(_nr) (EXYNOS5_GPIO_Y6_START + (_nr)) | ||
254 | #define EXYNOS5_GPX0(_nr) (EXYNOS5_GPIO_X0_START + (_nr)) | ||
255 | #define EXYNOS5_GPX1(_nr) (EXYNOS5_GPIO_X1_START + (_nr)) | ||
256 | #define EXYNOS5_GPX2(_nr) (EXYNOS5_GPIO_X2_START + (_nr)) | ||
257 | #define EXYNOS5_GPX3(_nr) (EXYNOS5_GPIO_X3_START + (_nr)) | ||
258 | #define EXYNOS5_GPE0(_nr) (EXYNOS5_GPIO_E0_START + (_nr)) | ||
259 | #define EXYNOS5_GPE1(_nr) (EXYNOS5_GPIO_E1_START + (_nr)) | ||
260 | #define EXYNOS5_GPF0(_nr) (EXYNOS5_GPIO_F0_START + (_nr)) | ||
261 | #define EXYNOS5_GPF1(_nr) (EXYNOS5_GPIO_F1_START + (_nr)) | ||
262 | #define EXYNOS5_GPG0(_nr) (EXYNOS5_GPIO_G0_START + (_nr)) | ||
263 | #define EXYNOS5_GPG1(_nr) (EXYNOS5_GPIO_G1_START + (_nr)) | ||
264 | #define EXYNOS5_GPG2(_nr) (EXYNOS5_GPIO_G2_START + (_nr)) | ||
265 | #define EXYNOS5_GPH0(_nr) (EXYNOS5_GPIO_H0_START + (_nr)) | ||
266 | #define EXYNOS5_GPH1(_nr) (EXYNOS5_GPIO_H1_START + (_nr)) | ||
267 | #define EXYNOS5_GPV0(_nr) (EXYNOS5_GPIO_V0_START + (_nr)) | ||
268 | #define EXYNOS5_GPV1(_nr) (EXYNOS5_GPIO_V1_START + (_nr)) | ||
269 | #define EXYNOS5_GPV2(_nr) (EXYNOS5_GPIO_V2_START + (_nr)) | ||
270 | #define EXYNOS5_GPV3(_nr) (EXYNOS5_GPIO_V3_START + (_nr)) | ||
271 | #define EXYNOS5_GPV4(_nr) (EXYNOS5_GPIO_V4_START + (_nr)) | ||
272 | #define EXYNOS5_GPZ(_nr) (EXYNOS5_GPIO_Z_START + (_nr)) | ||
273 | |||
274 | /* the end of the EXYNOS5 specific gpios */ | ||
275 | |||
276 | #define EXYNOS5_GPIO_END (EXYNOS5_GPZ(EXYNOS5_GPIO_Z_NR) + 1) | ||
277 | |||
278 | /* actually, EXYNOS5_GPIO_END is bigger than EXYNOS4 */ | ||
279 | |||
280 | #define S3C_GPIO_END (EXYNOS5_GPIO_END) | ||
281 | |||
282 | /* define the number of gpios */ | ||
283 | |||
284 | #define ARCH_NR_GPIOS (CONFIG_SAMSUNG_GPIO_EXTRA + S3C_GPIO_END) | ||
148 | 285 | ||
149 | #endif /* __ASM_ARCH_GPIO_H */ | 286 | #endif /* __ASM_ARCH_GPIO_H */ |