diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2011-11-06 00:54:56 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-11-06 00:54:56 -0400 |
commit | 830145796a5c8f1ca3f87ea619063c1d99a57df5 (patch) | |
tree | e72a0ecacfcce228c46d93c946cfd65a44cc1fd3 /arch/arm/mach-exynos/headsmp.S | |
parent | e700e41d9abfbf9fee01e979a41b185695132c19 (diff) |
ARM: EXYNOS: Add ARCH_EXYNOS and reorganize arch/arm/mach-exynos
The arch/arm/mach-exynos4 directory (CONFIG_ARCH_EXYNOS4) has
made for plaforms based on EXYNOS4 SoCs. But since upcoming
Samsung's SoCs such as EXYNOS5 (ARM Cortex A15) can reuse most
codes in current mach-exynos4, one mach-exynos directory will
be used for them.
This patch changes to CONFIG_ARCH_EXYNOS (arch/arm/mach-exynos)
but keeps original CONFIG_ARCH_EXYNOS4 in mach-exynos/Kconfig to
avoid changing in driver side.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/headsmp.S')
-rw-r--r-- | arch/arm/mach-exynos/headsmp.S | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/headsmp.S b/arch/arm/mach-exynos/headsmp.S new file mode 100644 index 000000000000..3cdeb3647542 --- /dev/null +++ b/arch/arm/mach-exynos/headsmp.S | |||
@@ -0,0 +1,41 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-exynos4/headsmp.S | ||
3 | * | ||
4 | * Cloned from linux/arch/arm/mach-realview/headsmp.S | ||
5 | * | ||
6 | * Copyright (c) 2003 ARM Limited | ||
7 | * All Rights Reserved | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | #include <linux/linkage.h> | ||
14 | #include <linux/init.h> | ||
15 | |||
16 | __CPUINIT | ||
17 | |||
18 | /* | ||
19 | * exynos4 specific entry point for secondary CPUs. This provides | ||
20 | * a "holding pen" into which all secondary cores are held until we're | ||
21 | * ready for them to initialise. | ||
22 | */ | ||
23 | ENTRY(exynos4_secondary_startup) | ||
24 | mrc p15, 0, r0, c0, c0, 5 | ||
25 | and r0, r0, #15 | ||
26 | adr r4, 1f | ||
27 | ldmia r4, {r5, r6} | ||
28 | sub r4, r4, r5 | ||
29 | add r6, r6, r4 | ||
30 | pen: ldr r7, [r6] | ||
31 | cmp r7, r0 | ||
32 | bne pen | ||
33 | |||
34 | /* | ||
35 | * we've been released from the holding pen: secondary_stack | ||
36 | * should now contain the SVC stack for this core | ||
37 | */ | ||
38 | b secondary_startup | ||
39 | |||
40 | 1: .long . | ||
41 | .long pen_release | ||