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authorTushar Behera <tushar.behera@linaro.org>2012-05-12 03:12:20 -0400
committerKukjin Kim <kgene.kim@samsung.com>2012-05-12 03:12:20 -0400
commitd1e819e57b5211efcde9055949b58e8edd232222 (patch)
treea1e63e24290e9bf528e756511bd3f671cecb1036 /arch/arm/mach-exynos/dev-audio.c
parent7f9851fea7108ac6e9709e8127790eb58224c2b9 (diff)
ARM: EXYNOS: Use common macro to define resources on dev-audio.c
Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/dev-audio.c')
-rw-r--r--arch/arm/mach-exynos/dev-audio.c156
1 files changed, 26 insertions, 130 deletions
diff --git a/arch/arm/mach-exynos/dev-audio.c b/arch/arm/mach-exynos/dev-audio.c
index 7199e1ae79b4..b33a5b67b547 100644
--- a/arch/arm/mach-exynos/dev-audio.c
+++ b/arch/arm/mach-exynos/dev-audio.c
@@ -62,26 +62,10 @@ static struct s3c_audio_pdata i2sv5_pdata = {
62}; 62};
63 63
64static struct resource exynos4_i2s0_resource[] = { 64static struct resource exynos4_i2s0_resource[] = {
65 [0] = { 65 [0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S0, SZ_256),
66 .start = EXYNOS4_PA_I2S0, 66 [1] = DEFINE_RES_DMA(DMACH_I2S0_TX),
67 .end = EXYNOS4_PA_I2S0 + 0x100 - 1, 67 [2] = DEFINE_RES_DMA(DMACH_I2S0_RX),
68 .flags = IORESOURCE_MEM, 68 [3] = DEFINE_RES_DMA(DMACH_I2S0S_TX),
69 },
70 [1] = {
71 .start = DMACH_I2S0_TX,
72 .end = DMACH_I2S0_TX,
73 .flags = IORESOURCE_DMA,
74 },
75 [2] = {
76 .start = DMACH_I2S0_RX,
77 .end = DMACH_I2S0_RX,
78 .flags = IORESOURCE_DMA,
79 },
80 [3] = {
81 .start = DMACH_I2S0S_TX,
82 .end = DMACH_I2S0S_TX,
83 .flags = IORESOURCE_DMA,
84 },
85}; 69};
86 70
87struct platform_device exynos4_device_i2s0 = { 71struct platform_device exynos4_device_i2s0 = {
@@ -110,21 +94,9 @@ static struct s3c_audio_pdata i2sv3_pdata = {
110}; 94};
111 95
112static struct resource exynos4_i2s1_resource[] = { 96static struct resource exynos4_i2s1_resource[] = {
113 [0] = { 97 [0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S1, SZ_256),
114 .start = EXYNOS4_PA_I2S1, 98 [1] = DEFINE_RES_DMA(DMACH_I2S1_TX),
115 .end = EXYNOS4_PA_I2S1 + 0x100 - 1, 99 [2] = DEFINE_RES_DMA(DMACH_I2S1_RX),
116 .flags = IORESOURCE_MEM,
117 },
118 [1] = {
119 .start = DMACH_I2S1_TX,
120 .end = DMACH_I2S1_TX,
121 .flags = IORESOURCE_DMA,
122 },
123 [2] = {
124 .start = DMACH_I2S1_RX,
125 .end = DMACH_I2S1_RX,
126 .flags = IORESOURCE_DMA,
127 },
128}; 100};
129 101
130struct platform_device exynos4_device_i2s1 = { 102struct platform_device exynos4_device_i2s1 = {
@@ -138,21 +110,9 @@ struct platform_device exynos4_device_i2s1 = {
138}; 110};
139 111
140static struct resource exynos4_i2s2_resource[] = { 112static struct resource exynos4_i2s2_resource[] = {
141 [0] = { 113 [0] = DEFINE_RES_MEM(EXYNOS4_PA_I2S2, SZ_256),
142 .start = EXYNOS4_PA_I2S2, 114 [1] = DEFINE_RES_DMA(DMACH_I2S2_TX),
143 .end = EXYNOS4_PA_I2S2 + 0x100 - 1, 115 [2] = DEFINE_RES_DMA(DMACH_I2S2_RX),
144 .flags = IORESOURCE_MEM,
145 },
146 [1] = {
147 .start = DMACH_I2S2_TX,
148 .end = DMACH_I2S2_TX,
149 .flags = IORESOURCE_DMA,
150 },
151 [2] = {
152 .start = DMACH_I2S2_RX,
153 .end = DMACH_I2S2_RX,
154 .flags = IORESOURCE_DMA,
155 },
156}; 116};
157 117
158struct platform_device exynos4_device_i2s2 = { 118struct platform_device exynos4_device_i2s2 = {
@@ -192,21 +152,9 @@ static struct s3c_audio_pdata s3c_pcm_pdata = {
192}; 152};
193 153
194static struct resource exynos4_pcm0_resource[] = { 154static struct resource exynos4_pcm0_resource[] = {
195 [0] = { 155 [0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM0, SZ_256),
196 .start = EXYNOS4_PA_PCM0, 156 [1] = DEFINE_RES_DMA(DMACH_PCM0_TX),
197 .end = EXYNOS4_PA_PCM0 + 0x100 - 1, 157 [2] = DEFINE_RES_DMA(DMACH_PCM0_RX),
198 .flags = IORESOURCE_MEM,
199 },
200 [1] = {
201 .start = DMACH_PCM0_TX,
202 .end = DMACH_PCM0_TX,
203 .flags = IORESOURCE_DMA,
204 },
205 [2] = {
206 .start = DMACH_PCM0_RX,
207 .end = DMACH_PCM0_RX,
208 .flags = IORESOURCE_DMA,
209 },
210}; 158};
211 159
212struct platform_device exynos4_device_pcm0 = { 160struct platform_device exynos4_device_pcm0 = {
@@ -220,21 +168,9 @@ struct platform_device exynos4_device_pcm0 = {
220}; 168};
221 169
222static struct resource exynos4_pcm1_resource[] = { 170static struct resource exynos4_pcm1_resource[] = {
223 [0] = { 171 [0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM1, SZ_256),
224 .start = EXYNOS4_PA_PCM1, 172 [1] = DEFINE_RES_DMA(DMACH_PCM1_TX),
225 .end = EXYNOS4_PA_PCM1 + 0x100 - 1, 173 [2] = DEFINE_RES_DMA(DMACH_PCM1_RX),
226 .flags = IORESOURCE_MEM,
227 },
228 [1] = {
229 .start = DMACH_PCM1_TX,
230 .end = DMACH_PCM1_TX,
231 .flags = IORESOURCE_DMA,
232 },
233 [2] = {
234 .start = DMACH_PCM1_RX,
235 .end = DMACH_PCM1_RX,
236 .flags = IORESOURCE_DMA,
237 },
238}; 174};
239 175
240struct platform_device exynos4_device_pcm1 = { 176struct platform_device exynos4_device_pcm1 = {
@@ -248,21 +184,9 @@ struct platform_device exynos4_device_pcm1 = {
248}; 184};
249 185
250static struct resource exynos4_pcm2_resource[] = { 186static struct resource exynos4_pcm2_resource[] = {
251 [0] = { 187 [0] = DEFINE_RES_MEM(EXYNOS4_PA_PCM2, SZ_256),
252 .start = EXYNOS4_PA_PCM2, 188 [1] = DEFINE_RES_DMA(DMACH_PCM2_TX),
253 .end = EXYNOS4_PA_PCM2 + 0x100 - 1, 189 [2] = DEFINE_RES_DMA(DMACH_PCM2_RX),
254 .flags = IORESOURCE_MEM,
255 },
256 [1] = {
257 .start = DMACH_PCM2_TX,
258 .end = DMACH_PCM2_TX,
259 .flags = IORESOURCE_DMA,
260 },
261 [2] = {
262 .start = DMACH_PCM2_RX,
263 .end = DMACH_PCM2_RX,
264 .flags = IORESOURCE_DMA,
265 },
266}; 190};
267 191
268struct platform_device exynos4_device_pcm2 = { 192struct platform_device exynos4_device_pcm2 = {
@@ -283,31 +207,11 @@ static int exynos4_ac97_cfg_gpio(struct platform_device *pdev)
283} 207}
284 208
285static struct resource exynos4_ac97_resource[] = { 209static struct resource exynos4_ac97_resource[] = {
286 [0] = { 210 [0] = DEFINE_RES_MEM(EXYNOS4_PA_AC97, SZ_256),
287 .start = EXYNOS4_PA_AC97, 211 [1] = DEFINE_RES_DMA(DMACH_AC97_PCMOUT),
288 .end = EXYNOS4_PA_AC97 + 0x100 - 1, 212 [2] = DEFINE_RES_DMA(DMACH_AC97_PCMIN),
289 .flags = IORESOURCE_MEM, 213 [3] = DEFINE_RES_DMA(DMACH_AC97_MICIN),
290 }, 214 [4] = DEFINE_RES_IRQ(EXYNOS4_IRQ_AC97),
291 [1] = {
292 .start = DMACH_AC97_PCMOUT,
293 .end = DMACH_AC97_PCMOUT,
294 .flags = IORESOURCE_DMA,
295 },
296 [2] = {
297 .start = DMACH_AC97_PCMIN,
298 .end = DMACH_AC97_PCMIN,
299 .flags = IORESOURCE_DMA,
300 },
301 [3] = {
302 .start = DMACH_AC97_MICIN,
303 .end = DMACH_AC97_MICIN,
304 .flags = IORESOURCE_DMA,
305 },
306 [4] = {
307 .start = EXYNOS4_IRQ_AC97,
308 .end = EXYNOS4_IRQ_AC97,
309 .flags = IORESOURCE_IRQ,
310 },
311}; 215};
312 216
313static struct s3c_audio_pdata s3c_ac97_pdata = { 217static struct s3c_audio_pdata s3c_ac97_pdata = {
@@ -338,16 +242,8 @@ static int exynos4_spdif_cfg_gpio(struct platform_device *pdev)
338} 242}
339 243
340static struct resource exynos4_spdif_resource[] = { 244static struct resource exynos4_spdif_resource[] = {
341 [0] = { 245 [0] = DEFINE_RES_MEM(EXYNOS4_PA_SPDIF, SZ_256),
342 .start = EXYNOS4_PA_SPDIF, 246 [1] = DEFINE_RES_DMA(DMACH_SPDIF),
343 .end = EXYNOS4_PA_SPDIF + 0x100 - 1,
344 .flags = IORESOURCE_MEM,
345 },
346 [1] = {
347 .start = DMACH_SPDIF,
348 .end = DMACH_SPDIF,
349 .flags = IORESOURCE_DMA,
350 },
351}; 247};
352 248
353static struct s3c_audio_pdata samsung_spdif_pdata = { 249static struct s3c_audio_pdata samsung_spdif_pdata = {
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-31 20:45:48 -0400