diff options
author | Sachin Kamat <sachin.kamat@linaro.org> | 2014-03-20 13:09:39 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-03-20 13:09:39 -0400 |
commit | 6eb84669cf7e94214593f162d4c1cf20424dd906 (patch) | |
tree | beaad2456cb6fb320dda68f2950129d05fc030f7 /arch/arm/mach-exynos/common.c | |
parent | 58553078c1feb40e0a02d7c72ae41dd6b923f231 (diff) |
ARM: EXYNOS: Consolidate CPU init code
cpu_table was used to distinguish between different Exynos4 and 5
SoCs and based on the type do the initialization and io mapping.
exynos_init is dummy and no longer needed as we do a DT based booting.
By having a common io mapping function we can get rid of the whole
table and avoid populating it for every SoC.
Tested on Exynos4210, 5250 and 5420 based boards.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Tested-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/common.c')
-rw-r--r-- | arch/arm/mach-exynos/common.c | 108 |
1 files changed, 23 insertions, 85 deletions
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index f18be40e5b21..cd70d74c8eec 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c | |||
@@ -48,56 +48,6 @@ | |||
48 | #define L2_AUX_VAL 0x7C470001 | 48 | #define L2_AUX_VAL 0x7C470001 |
49 | #define L2_AUX_MASK 0xC200ffff | 49 | #define L2_AUX_MASK 0xC200ffff |
50 | 50 | ||
51 | static const char name_exynos4210[] = "EXYNOS4210"; | ||
52 | static const char name_exynos4212[] = "EXYNOS4212"; | ||
53 | static const char name_exynos4412[] = "EXYNOS4412"; | ||
54 | static const char name_exynos5250[] = "EXYNOS5250"; | ||
55 | static const char name_exynos5420[] = "EXYNOS5420"; | ||
56 | static const char name_exynos5440[] = "EXYNOS5440"; | ||
57 | |||
58 | static void exynos4_map_io(void); | ||
59 | static void exynos5_map_io(void); | ||
60 | static int exynos_init(void); | ||
61 | |||
62 | static struct cpu_table cpu_ids[] __initdata = { | ||
63 | { | ||
64 | .idcode = EXYNOS4210_CPU_ID, | ||
65 | .idmask = EXYNOS4_CPU_MASK, | ||
66 | .map_io = exynos4_map_io, | ||
67 | .init = exynos_init, | ||
68 | .name = name_exynos4210, | ||
69 | }, { | ||
70 | .idcode = EXYNOS4212_CPU_ID, | ||
71 | .idmask = EXYNOS4_CPU_MASK, | ||
72 | .map_io = exynos4_map_io, | ||
73 | .init = exynos_init, | ||
74 | .name = name_exynos4212, | ||
75 | }, { | ||
76 | .idcode = EXYNOS4412_CPU_ID, | ||
77 | .idmask = EXYNOS4_CPU_MASK, | ||
78 | .map_io = exynos4_map_io, | ||
79 | .init = exynos_init, | ||
80 | .name = name_exynos4412, | ||
81 | }, { | ||
82 | .idcode = EXYNOS5250_SOC_ID, | ||
83 | .idmask = EXYNOS5_SOC_MASK, | ||
84 | .map_io = exynos5_map_io, | ||
85 | .init = exynos_init, | ||
86 | .name = name_exynos5250, | ||
87 | }, { | ||
88 | .idcode = EXYNOS5420_SOC_ID, | ||
89 | .idmask = EXYNOS5_SOC_MASK, | ||
90 | .map_io = exynos5_map_io, | ||
91 | .init = exynos_init, | ||
92 | .name = name_exynos5420, | ||
93 | }, { | ||
94 | .idcode = EXYNOS5440_SOC_ID, | ||
95 | .idmask = EXYNOS5_SOC_MASK, | ||
96 | .init = exynos_init, | ||
97 | .name = name_exynos5440, | ||
98 | }, | ||
99 | }; | ||
100 | |||
101 | /* Initial IO mappings */ | 51 | /* Initial IO mappings */ |
102 | 52 | ||
103 | static struct map_desc exynos4_iodesc[] __initdata = { | 53 | static struct map_desc exynos4_iodesc[] __initdata = { |
@@ -345,6 +295,28 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname, | |||
345 | * | 295 | * |
346 | * register the standard cpu IO areas | 296 | * register the standard cpu IO areas |
347 | */ | 297 | */ |
298 | static void __init exynos_map_io(void) | ||
299 | { | ||
300 | if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412()) | ||
301 | iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); | ||
302 | |||
303 | if (soc_is_exynos5250() || soc_is_exynos5420()) | ||
304 | iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); | ||
305 | |||
306 | if (soc_is_exynos4210()) { | ||
307 | if (samsung_rev() == EXYNOS4210_REV_0) | ||
308 | iotable_init(exynos4_iodesc0, | ||
309 | ARRAY_SIZE(exynos4_iodesc0)); | ||
310 | else | ||
311 | iotable_init(exynos4_iodesc1, | ||
312 | ARRAY_SIZE(exynos4_iodesc1)); | ||
313 | iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc)); | ||
314 | } | ||
315 | if (soc_is_exynos4212() || soc_is_exynos4412()) | ||
316 | iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc)); | ||
317 | if (soc_is_exynos5250()) | ||
318 | iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc)); | ||
319 | } | ||
348 | 320 | ||
349 | void __init exynos_init_io(void) | 321 | void __init exynos_init_io(void) |
350 | { | 322 | { |
@@ -355,30 +327,7 @@ void __init exynos_init_io(void) | |||
355 | /* detect cpu id and rev. */ | 327 | /* detect cpu id and rev. */ |
356 | s5p_init_cpu(S5P_VA_CHIPID); | 328 | s5p_init_cpu(S5P_VA_CHIPID); |
357 | 329 | ||
358 | s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids)); | 330 | exynos_map_io(); |
359 | } | ||
360 | |||
361 | static void __init exynos4_map_io(void) | ||
362 | { | ||
363 | iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); | ||
364 | |||
365 | if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0) | ||
366 | iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0)); | ||
367 | else | ||
368 | iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1)); | ||
369 | |||
370 | if (soc_is_exynos4210()) | ||
371 | iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc)); | ||
372 | if (soc_is_exynos4212() || soc_is_exynos4412()) | ||
373 | iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc)); | ||
374 | } | ||
375 | |||
376 | static void __init exynos5_map_io(void) | ||
377 | { | ||
378 | iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc)); | ||
379 | |||
380 | if (soc_is_exynos5250()) | ||
381 | iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc)); | ||
382 | } | 331 | } |
383 | 332 | ||
384 | struct bus_type exynos_subsys = { | 333 | struct bus_type exynos_subsys = { |
@@ -386,10 +335,6 @@ struct bus_type exynos_subsys = { | |||
386 | .dev_name = "exynos-core", | 335 | .dev_name = "exynos-core", |
387 | }; | 336 | }; |
388 | 337 | ||
389 | static struct device exynos4_dev = { | ||
390 | .bus = &exynos_subsys, | ||
391 | }; | ||
392 | |||
393 | static int __init exynos_core_init(void) | 338 | static int __init exynos_core_init(void) |
394 | { | 339 | { |
395 | return subsys_system_register(&exynos_subsys, NULL); | 340 | return subsys_system_register(&exynos_subsys, NULL); |
@@ -409,10 +354,3 @@ static int __init exynos4_l2x0_cache_init(void) | |||
409 | return 0; | 354 | return 0; |
410 | } | 355 | } |
411 | early_initcall(exynos4_l2x0_cache_init); | 356 | early_initcall(exynos4_l2x0_cache_init); |
412 | |||
413 | static int __init exynos_init(void) | ||
414 | { | ||
415 | printk(KERN_INFO "EXYNOS: Initializing architecture\n"); | ||
416 | |||
417 | return device_register(&exynos4_dev); | ||
418 | } | ||