[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach

This just leaves include/asm-arm/plat-* to deal with.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

29 files changed, 720 insertions, 14 deletions

diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index 8f87f8a41483..aa1fb352fb8f 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -19,7 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <asm/io.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index 4642c70f21e0..6062e47f2043 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -16,7 +16,7 @@
 #include <linux/module.h>
 #include <linux/string.h>
 #include <asm/div64.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/io.h>
 
 struct clk {
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index b49da117af9b..f99f43669392 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -36,7 +36,7 @@
 #include <asm/types.h>
 #include <asm/setup.h>
 #include <asm/memory.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/irq.h>
 #include <asm/system.h>
 #include <asm/tlbflush.h>
@@ -46,7 +46,7 @@
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
-#include <asm/arch/gpio.h>
+#include <mach/gpio.h>
 
 #include <asm/hardware/vic.h>
 
diff --git a/arch/arm/mach-ep93xx/edb9302.c b/arch/arm/mach-ep93xx/edb9302.c
index 1650ec724228..97550c0ad7b0 100644
--- a/arch/arm/mach-ep93xx/edb9302.c
+++ b/arch/arm/mach-ep93xx/edb9302.c
@@ -19,7 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <asm/io.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-ep93xx/edb9302a.c b/arch/arm/mach-ep93xx/edb9302a.c
index 00208ce6e620..99b01d44bf1c 100644
--- a/arch/arm/mach-ep93xx/edb9302a.c
+++ b/arch/arm/mach-ep93xx/edb9302a.c
@@ -19,7 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <asm/io.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-ep93xx/edb9307.c b/arch/arm/mach-ep93xx/edb9307.c
index 78d04aeca463..9fb72d01a36c 100644
--- a/arch/arm/mach-ep93xx/edb9307.c
+++ b/arch/arm/mach-ep93xx/edb9307.c
@@ -19,7 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <asm/io.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-ep93xx/edb9312.c b/arch/arm/mach-ep93xx/edb9312.c
index d658fb2f574b..87267a574f5e 100644
--- a/arch/arm/mach-ep93xx/edb9312.c
+++ b/arch/arm/mach-ep93xx/edb9312.c
@@ -20,7 +20,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <asm/io.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-ep93xx/edb9315.c b/arch/arm/mach-ep93xx/edb9315.c
index 4fd1cd671521..7e373950be4d 100644
--- a/arch/arm/mach-ep93xx/edb9315.c
+++ b/arch/arm/mach-ep93xx/edb9315.c
@@ -19,7 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <asm/io.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-ep93xx/edb9315a.c b/arch/arm/mach-ep93xx/edb9315a.c
index 44dacbac8635..08a7c9bfb689 100644
--- a/arch/arm/mach-ep93xx/edb9315a.c
+++ b/arch/arm/mach-ep93xx/edb9315a.c
@@ -19,7 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <asm/io.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index cc80031b4ef8..9b41ec1f089e 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -19,7 +19,7 @@
 #include <linux/mtd/physmap.h>
 #include <linux/platform_device.h>
 #include <asm/io.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c
index dc2e4c00d989..0f3fb87ca4be 100644
--- a/arch/arm/mach-ep93xx/gpio.c
+++ b/arch/arm/mach-ep93xx/gpio.c
@@ -17,7 +17,7 @@
 #include <linux/module.h>
 #include <linux/seq_file.h>
 
-#include <asm/arch/ep93xx-regs.h>
+#include <mach/ep93xx-regs.h>
 #include <asm/io.h>
 #include <asm/gpio.h>
 
diff --git a/arch/arm/mach-ep93xx/include/mach/debug-macro.S b/arch/arm/mach-ep93xx/include/mach/debug-macro.S
new file mode 100644
index 000000000000..802858bc8095
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/debug-macro.S
@@ -0,0 +1,22 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/debug-macro.S
+ * Debugging macro include header
+ *
+ * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+#include <mach/ep93xx-regs.h>
+
+                .macro  addruart,rx
+                mrc     p15, 0, \rx, c1, c0
+                tst     \rx, #1                         @ MMU enabled?
+                ldreq   \rx, =EP93XX_APB_PHYS_BASE      @ Physical base
+                ldrne   \rx, =EP93XX_APB_VIRT_BASE      @ virtual base
+                orr     \rx, \rx, #0x000c0000
+                .endm
+
+#include <asm/hardware/debug-pl01x.S>
diff --git a/arch/arm/mach-ep93xx/include/mach/dma.h b/arch/arm/mach-ep93xx/include/mach/dma.h
new file mode 100644
index 000000000000..d0fa9656e92f
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/dma.h
@@ -0,0 +1,3 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/dma.h
+ */
diff --git a/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
new file mode 100644
index 000000000000..96b85e2c2c0b
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/entry-macro.S
@@ -0,0 +1,59 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/entry-macro.S
+ * IRQ demultiplexing for EP93xx
+ *
+ * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+#include <mach/ep93xx-regs.h>
+
+                .macro  disable_fiq
+                .endm
+
+                .macro  get_irqnr_preamble, base, tmp
+                .endm
+
+                .macro  arch_ret_to_user, tmp1, tmp2
+                .endm
+
+                .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
+                ldr     \base, =(EP93XX_AHB_VIRT_BASE)
+                orr     \base, \base, #0x000b0000
+                mov     \irqnr, #0
+                ldr     \irqstat, [\base]               @ lower 32 interrupts
+                cmp     \irqstat, #0
+                bne     1001f
+
+                eor     \base, \base, #0x00070000
+                ldr     \irqstat, [\base]               @ upper 32 interrupts
+                cmp     \irqstat, #0
+                beq     1002f
+                mov     \irqnr, #0x20
+
+1001:
+                movs    \tmp, \irqstat, lsl #16
+                movne   \irqstat, \tmp
+                addeq   \irqnr, \irqnr, #16
+
+                movs    \tmp, \irqstat, lsl #8
+                movne   \irqstat, \tmp
+                addeq   \irqnr, \irqnr, #8
+
+                movs    \tmp, \irqstat, lsl #4
+                movne   \irqstat, \tmp
+                addeq   \irqnr, \irqnr, #4
+
+                movs    \tmp, \irqstat, lsl #2
+                movne   \irqstat, \tmp
+                addeq   \irqnr, \irqnr, #2
+
+                movs    \tmp, \irqstat, lsl #1
+                addeq   \irqnr, \irqnr, #1
+                orrs    \base, \base, #1
+
+1002:
+                .endm
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
new file mode 100644
index 000000000000..9f4458c8e070
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
@@ -0,0 +1,133 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h
+ */
+
+#ifndef __ASM_ARCH_EP93XX_REGS_H
+#define __ASM_ARCH_EP93XX_REGS_H
+
+/*
+ * EP93xx linux memory map:
+ *
+ * virt         phys            size
+ * fe800000                     5M              per-platform mappings
+ * fed00000     80800000        2M              APB
+ * fef00000     80000000        1M              AHB
+ */
+
+#define EP93XX_AHB_PHYS_BASE            0x80000000
+#define EP93XX_AHB_VIRT_BASE            0xfef00000
+#define EP93XX_AHB_SIZE                 0x00100000
+
+#define EP93XX_APB_PHYS_BASE            0x80800000
+#define EP93XX_APB_VIRT_BASE            0xfed00000
+#define EP93XX_APB_SIZE                 0x00200000
+
+
+/* AHB peripherals */
+#define EP93XX_DMA_BASE                 (EP93XX_AHB_VIRT_BASE + 0x00000000)
+
+#define EP93XX_ETHERNET_BASE            (EP93XX_AHB_VIRT_BASE + 0x00010000)
+#define EP93XX_ETHERNET_PHYS_BASE       (EP93XX_AHB_PHYS_BASE + 0x00010000)
+
+#define EP93XX_USB_BASE                 (EP93XX_AHB_VIRT_BASE + 0x00020000)
+#define EP93XX_USB_PHYS_BASE            (EP93XX_AHB_PHYS_BASE + 0x00020000)
+
+#define EP93XX_RASTER_BASE              (EP93XX_AHB_VIRT_BASE + 0x00030000)
+
+#define EP93XX_GRAPHICS_ACCEL_BASE      (EP93XX_AHB_VIRT_BASE + 0x00040000)
+
+#define EP93XX_SDRAM_CONTROLLER_BASE    (EP93XX_AHB_VIRT_BASE + 0x00060000)
+
+#define EP93XX_PCMCIA_CONTROLLER_BASE   (EP93XX_AHB_VIRT_BASE + 0x00080000)
+
+#define EP93XX_BOOT_ROM_BASE            (EP93XX_AHB_VIRT_BASE + 0x00090000)
+
+#define EP93XX_IDE_BASE                 (EP93XX_AHB_VIRT_BASE + 0x000a0000)
+
+#define EP93XX_VIC1_BASE                (EP93XX_AHB_VIRT_BASE + 0x000b0000)
+
+#define EP93XX_VIC2_BASE                (EP93XX_AHB_VIRT_BASE + 0x000c0000)
+
+
+/* APB peripherals */
+#define EP93XX_TIMER_BASE               (EP93XX_APB_VIRT_BASE + 0x00010000)
+#define EP93XX_TIMER_REG(x)             (EP93XX_TIMER_BASE + (x))
+#define EP93XX_TIMER1_LOAD              EP93XX_TIMER_REG(0x00)
+#define EP93XX_TIMER1_VALUE             EP93XX_TIMER_REG(0x04)
+#define EP93XX_TIMER1_CONTROL           EP93XX_TIMER_REG(0x08)
+#define EP93XX_TIMER1_CLEAR             EP93XX_TIMER_REG(0x0c)
+#define EP93XX_TIMER2_LOAD              EP93XX_TIMER_REG(0x20)
+#define EP93XX_TIMER2_VALUE             EP93XX_TIMER_REG(0x24)
+#define EP93XX_TIMER2_CONTROL           EP93XX_TIMER_REG(0x28)
+#define EP93XX_TIMER2_CLEAR             EP93XX_TIMER_REG(0x2c)
+#define EP93XX_TIMER4_VALUE_LOW         EP93XX_TIMER_REG(0x60)
+#define EP93XX_TIMER4_VALUE_HIGH        EP93XX_TIMER_REG(0x64)
+#define EP93XX_TIMER3_LOAD              EP93XX_TIMER_REG(0x80)
+#define EP93XX_TIMER3_VALUE             EP93XX_TIMER_REG(0x84)
+#define EP93XX_TIMER3_CONTROL           EP93XX_TIMER_REG(0x88)
+#define EP93XX_TIMER3_CLEAR             EP93XX_TIMER_REG(0x8c)
+
+#define EP93XX_I2S_BASE                 (EP93XX_APB_VIRT_BASE + 0x00020000)
+
+#define EP93XX_SECURITY_BASE            (EP93XX_APB_VIRT_BASE + 0x00030000)
+
+#define EP93XX_GPIO_BASE                (EP93XX_APB_VIRT_BASE + 0x00040000)
+#define EP93XX_GPIO_REG(x)              (EP93XX_GPIO_BASE + (x))
+#define EP93XX_GPIO_F_INT_TYPE1         EP93XX_GPIO_REG(0x4c)
+#define EP93XX_GPIO_F_INT_TYPE2         EP93XX_GPIO_REG(0x50)
+#define EP93XX_GPIO_F_INT_ACK           EP93XX_GPIO_REG(0x54)
+#define EP93XX_GPIO_F_INT_ENABLE        EP93XX_GPIO_REG(0x58)
+#define EP93XX_GPIO_F_INT_STATUS        EP93XX_GPIO_REG(0x5c)
+#define EP93XX_GPIO_A_INT_TYPE1         EP93XX_GPIO_REG(0x90)
+#define EP93XX_GPIO_A_INT_TYPE2         EP93XX_GPIO_REG(0x94)
+#define EP93XX_GPIO_A_INT_ACK           EP93XX_GPIO_REG(0x98)
+#define EP93XX_GPIO_A_INT_ENABLE        EP93XX_GPIO_REG(0x9c)
+#define EP93XX_GPIO_A_INT_STATUS        EP93XX_GPIO_REG(0xa0)
+#define EP93XX_GPIO_B_INT_TYPE1         EP93XX_GPIO_REG(0xac)
+#define EP93XX_GPIO_B_INT_TYPE2         EP93XX_GPIO_REG(0xb0)
+#define EP93XX_GPIO_B_INT_ACK           EP93XX_GPIO_REG(0xb4)
+#define EP93XX_GPIO_B_INT_ENABLE        EP93XX_GPIO_REG(0xb8)
+#define EP93XX_GPIO_B_INT_STATUS        EP93XX_GPIO_REG(0xbc)
+
+#define EP93XX_AAC_BASE                 (EP93XX_APB_VIRT_BASE + 0x00080000)
+
+#define EP93XX_SPI_BASE                 (EP93XX_APB_VIRT_BASE + 0x000a0000)
+
+#define EP93XX_IRDA_BASE                (EP93XX_APB_VIRT_BASE + 0x000b0000)
+
+#define EP93XX_UART1_BASE               (EP93XX_APB_VIRT_BASE + 0x000c0000)
+#define EP93XX_UART1_PHYS_BASE          (EP93XX_APB_PHYS_BASE + 0x000c0000)
+
+#define EP93XX_UART2_BASE               (EP93XX_APB_VIRT_BASE + 0x000d0000)
+#define EP93XX_UART2_PHYS_BASE          (EP93XX_APB_PHYS_BASE + 0x000d0000)
+
+#define EP93XX_UART3_BASE               (EP93XX_APB_VIRT_BASE + 0x000e0000)
+#define EP93XX_UART3_PHYS_BASE          (EP93XX_APB_PHYS_BASE + 0x000e0000)
+
+#define EP93XX_KEY_MATRIX_BASE          (EP93XX_APB_VIRT_BASE + 0x000f0000)
+
+#define EP93XX_ADC_BASE                 (EP93XX_APB_VIRT_BASE + 0x00100000)
+#define EP93XX_TOUCHSCREEN_BASE         (EP93XX_APB_VIRT_BASE + 0x00100000)
+
+#define EP93XX_PWM_BASE                 (EP93XX_APB_VIRT_BASE + 0x00110000)
+
+#define EP93XX_RTC_BASE                 (EP93XX_APB_VIRT_BASE + 0x00120000)
+
+#define EP93XX_SYSCON_BASE              (EP93XX_APB_VIRT_BASE + 0x00130000)
+#define EP93XX_SYSCON_REG(x)            (EP93XX_SYSCON_BASE + (x))
+#define EP93XX_SYSCON_POWER_STATE       EP93XX_SYSCON_REG(0x00)
+#define EP93XX_SYSCON_CLOCK_CONTROL     EP93XX_SYSCON_REG(0x04)
+#define EP93XX_SYSCON_CLOCK_UARTBAUD    0x20000000
+#define EP93XX_SYSCON_CLOCK_USH_EN      0x10000000
+#define EP93XX_SYSCON_HALT              EP93XX_SYSCON_REG(0x08)
+#define EP93XX_SYSCON_STANDBY           EP93XX_SYSCON_REG(0x0c)
+#define EP93XX_SYSCON_CLOCK_SET1        EP93XX_SYSCON_REG(0x20)
+#define EP93XX_SYSCON_CLOCK_SET2        EP93XX_SYSCON_REG(0x24)
+#define EP93XX_SYSCON_DEVICE_CONFIG     EP93XX_SYSCON_REG(0x80)
+#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE       0x00800000
+#define EP93XX_SYSCON_SWLOCK            EP93XX_SYSCON_REG(0xc0)
+
+#define EP93XX_WATCHDOG_BASE            (EP93XX_APB_VIRT_BASE + 0x00140000)
+
+
+#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/gesbc9312.h b/arch/arm/mach-ep93xx/include/mach/gesbc9312.h
new file mode 100644
index 000000000000..21fe2b922aa5
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/gesbc9312.h
@@ -0,0 +1,3 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/gesbc9312.h
+ */
diff --git a/arch/arm/mach-ep93xx/include/mach/gpio.h b/arch/arm/mach-ep93xx/include/mach/gpio.h
new file mode 100644
index 000000000000..f7020414c5df
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/gpio.h
@@ -0,0 +1,128 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/gpio.h
+ */
+
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H
+
+/* GPIO port A.  */
+#define EP93XX_GPIO_LINE_A(x)           ((x) + 0)
+#define EP93XX_GPIO_LINE_EGPIO0         EP93XX_GPIO_LINE_A(0)
+#define EP93XX_GPIO_LINE_EGPIO1         EP93XX_GPIO_LINE_A(1)
+#define EP93XX_GPIO_LINE_EGPIO2         EP93XX_GPIO_LINE_A(2)
+#define EP93XX_GPIO_LINE_EGPIO3         EP93XX_GPIO_LINE_A(3)
+#define EP93XX_GPIO_LINE_EGPIO4         EP93XX_GPIO_LINE_A(4)
+#define EP93XX_GPIO_LINE_EGPIO5         EP93XX_GPIO_LINE_A(5)
+#define EP93XX_GPIO_LINE_EGPIO6         EP93XX_GPIO_LINE_A(6)
+#define EP93XX_GPIO_LINE_EGPIO7         EP93XX_GPIO_LINE_A(7)
+
+/* GPIO port B.  */
+#define EP93XX_GPIO_LINE_B(x)           ((x) + 8)
+#define EP93XX_GPIO_LINE_EGPIO8         EP93XX_GPIO_LINE_B(0)
+#define EP93XX_GPIO_LINE_EGPIO9         EP93XX_GPIO_LINE_B(1)
+#define EP93XX_GPIO_LINE_EGPIO10        EP93XX_GPIO_LINE_B(2)
+#define EP93XX_GPIO_LINE_EGPIO11        EP93XX_GPIO_LINE_B(3)
+#define EP93XX_GPIO_LINE_EGPIO12        EP93XX_GPIO_LINE_B(4)
+#define EP93XX_GPIO_LINE_EGPIO13        EP93XX_GPIO_LINE_B(5)
+#define EP93XX_GPIO_LINE_EGPIO14        EP93XX_GPIO_LINE_B(6)
+#define EP93XX_GPIO_LINE_EGPIO15        EP93XX_GPIO_LINE_B(7)
+
+/* GPIO port C.  */
+#define EP93XX_GPIO_LINE_C(x)           ((x) + 40)
+#define EP93XX_GPIO_LINE_ROW0           EP93XX_GPIO_LINE_C(0)
+#define EP93XX_GPIO_LINE_ROW1           EP93XX_GPIO_LINE_C(1)
+#define EP93XX_GPIO_LINE_ROW2           EP93XX_GPIO_LINE_C(2)
+#define EP93XX_GPIO_LINE_ROW3           EP93XX_GPIO_LINE_C(3)
+#define EP93XX_GPIO_LINE_ROW4           EP93XX_GPIO_LINE_C(4)
+#define EP93XX_GPIO_LINE_ROW5           EP93XX_GPIO_LINE_C(5)
+#define EP93XX_GPIO_LINE_ROW6           EP93XX_GPIO_LINE_C(6)
+#define EP93XX_GPIO_LINE_ROW7           EP93XX_GPIO_LINE_C(7)
+
+/* GPIO port D.  */
+#define EP93XX_GPIO_LINE_D(x)           ((x) + 24)
+#define EP93XX_GPIO_LINE_COL0           EP93XX_GPIO_LINE_D(0)
+#define EP93XX_GPIO_LINE_COL1           EP93XX_GPIO_LINE_D(1)
+#define EP93XX_GPIO_LINE_COL2           EP93XX_GPIO_LINE_D(2)
+#define EP93XX_GPIO_LINE_COL3           EP93XX_GPIO_LINE_D(3)
+#define EP93XX_GPIO_LINE_COL4           EP93XX_GPIO_LINE_D(4)
+#define EP93XX_GPIO_LINE_COL5           EP93XX_GPIO_LINE_D(5)
+#define EP93XX_GPIO_LINE_COL6           EP93XX_GPIO_LINE_D(6)
+#define EP93XX_GPIO_LINE_COL7           EP93XX_GPIO_LINE_D(7)
+
+/* GPIO port E.  */
+#define EP93XX_GPIO_LINE_E(x)           ((x) + 32)
+#define EP93XX_GPIO_LINE_GRLED          EP93XX_GPIO_LINE_E(0)
+#define EP93XX_GPIO_LINE_RDLED          EP93XX_GPIO_LINE_E(1)
+#define EP93XX_GPIO_LINE_DIORn          EP93XX_GPIO_LINE_E(2)
+#define EP93XX_GPIO_LINE_IDECS1n        EP93XX_GPIO_LINE_E(3)
+#define EP93XX_GPIO_LINE_IDECS2n        EP93XX_GPIO_LINE_E(4)
+#define EP93XX_GPIO_LINE_IDEDA0         EP93XX_GPIO_LINE_E(5)
+#define EP93XX_GPIO_LINE_IDEDA1         EP93XX_GPIO_LINE_E(6)
+#define EP93XX_GPIO_LINE_IDEDA2         EP93XX_GPIO_LINE_E(7)
+
+/* GPIO port F.  */
+#define EP93XX_GPIO_LINE_F(x)           ((x) + 16)
+#define EP93XX_GPIO_LINE_WP             EP93XX_GPIO_LINE_F(0)
+#define EP93XX_GPIO_LINE_MCCD1          EP93XX_GPIO_LINE_F(1)
+#define EP93XX_GPIO_LINE_MCCD2          EP93XX_GPIO_LINE_F(2)
+#define EP93XX_GPIO_LINE_MCBVD1         EP93XX_GPIO_LINE_F(3)
+#define EP93XX_GPIO_LINE_MCBVD2         EP93XX_GPIO_LINE_F(4)
+#define EP93XX_GPIO_LINE_VS1            EP93XX_GPIO_LINE_F(5)
+#define EP93XX_GPIO_LINE_READY          EP93XX_GPIO_LINE_F(6)
+#define EP93XX_GPIO_LINE_VS2            EP93XX_GPIO_LINE_F(7)
+
+/* GPIO port G.  */
+#define EP93XX_GPIO_LINE_G(x)           ((x) + 48)
+#define EP93XX_GPIO_LINE_EECLK          EP93XX_GPIO_LINE_G(0)
+#define EP93XX_GPIO_LINE_EEDAT          EP93XX_GPIO_LINE_G(1)
+#define EP93XX_GPIO_LINE_SLA0           EP93XX_GPIO_LINE_G(2)
+#define EP93XX_GPIO_LINE_SLA1           EP93XX_GPIO_LINE_G(3)
+#define EP93XX_GPIO_LINE_DD12           EP93XX_GPIO_LINE_G(4)
+#define EP93XX_GPIO_LINE_DD13           EP93XX_GPIO_LINE_G(5)
+#define EP93XX_GPIO_LINE_DD14           EP93XX_GPIO_LINE_G(6)
+#define EP93XX_GPIO_LINE_DD15           EP93XX_GPIO_LINE_G(7)
+
+/* GPIO port H.  */
+#define EP93XX_GPIO_LINE_H(x)           ((x) + 56)
+#define EP93XX_GPIO_LINE_DD0            EP93XX_GPIO_LINE_H(0)
+#define EP93XX_GPIO_LINE_DD1            EP93XX_GPIO_LINE_H(1)
+#define EP93XX_GPIO_LINE_DD2            EP93XX_GPIO_LINE_H(2)
+#define EP93XX_GPIO_LINE_DD3            EP93XX_GPIO_LINE_H(3)
+#define EP93XX_GPIO_LINE_DD4            EP93XX_GPIO_LINE_H(4)
+#define EP93XX_GPIO_LINE_DD5            EP93XX_GPIO_LINE_H(5)
+#define EP93XX_GPIO_LINE_DD6            EP93XX_GPIO_LINE_H(6)
+#define EP93XX_GPIO_LINE_DD7            EP93XX_GPIO_LINE_H(7)
+
+/* maximum value for gpio line identifiers */
+#define EP93XX_GPIO_LINE_MAX            EP93XX_GPIO_LINE_H(7)
+
+/* maximum value for irq capable line identifiers */
+#define EP93XX_GPIO_LINE_MAX_IRQ        EP93XX_GPIO_LINE_F(7)
+
+/* new generic GPIO API - see Documentation/gpio.txt */
+
+#include <asm-generic/gpio.h>
+
+#define gpio_get_value  __gpio_get_value
+#define gpio_set_value  __gpio_set_value
+#define gpio_cansleep   __gpio_cansleep
+
+/*
+ * Map GPIO A0..A7  (0..7)  to irq 64..71,
+ *          B0..B7  (7..15) to irq 72..79, and
+ *          F0..F7 (16..24) to irq 80..87.
+ */
+static inline int gpio_to_irq(unsigned gpio)
+{
+        if (gpio <= EP93XX_GPIO_LINE_MAX_IRQ)
+                return 64 + gpio;
+
+        return -EINVAL;
+}
+
+static inline int irq_to_gpio(unsigned irq)
+{
+        return irq - gpio_to_irq(0);
+}
+
+#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/hardware.h b/arch/arm/mach-ep93xx/include/mach/hardware.h
new file mode 100644
index 000000000000..529807d182bf
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/hardware.h
@@ -0,0 +1,16 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/hardware.h
+ */
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+
+#include "ep93xx-regs.h"
+
+#define pcibios_assign_all_busses()     0
+
+#include "platform.h"
+
+#include "gesbc9312.h"
+#include "ts72xx.h"
+
+#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/io.h b/arch/arm/mach-ep93xx/include/mach/io.h
new file mode 100644
index 000000000000..1ab9a90ad339
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/io.h
@@ -0,0 +1,8 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/io.h
+ */
+
+#define IO_SPACE_LIMIT          0xffffffff
+
+#define __io(p)                 ((void __iomem *)(p))
+#define __mem_pci(p)            (p)
diff --git a/arch/arm/mach-ep93xx/include/mach/irqs.h b/arch/arm/mach-ep93xx/include/mach/irqs.h
new file mode 100644
index 000000000000..ff98390bbf0f
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/irqs.h
@@ -0,0 +1,78 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/irqs.h
+ */
+
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H
+
+#define IRQ_EP93XX_COMMRX               2
+#define IRQ_EP93XX_COMMTX               3
+#define IRQ_EP93XX_TIMER1               4
+#define IRQ_EP93XX_TIMER2               5
+#define IRQ_EP93XX_AACINTR              6
+#define IRQ_EP93XX_DMAM2P0              7
+#define IRQ_EP93XX_DMAM2P1              8
+#define IRQ_EP93XX_DMAM2P2              9
+#define IRQ_EP93XX_DMAM2P3              10
+#define IRQ_EP93XX_DMAM2P4              11
+#define IRQ_EP93XX_DMAM2P5              12
+#define IRQ_EP93XX_DMAM2P6              13
+#define IRQ_EP93XX_DMAM2P7              14
+#define IRQ_EP93XX_DMAM2P8              15
+#define IRQ_EP93XX_DMAM2P9              16
+#define IRQ_EP93XX_DMAM2M0              17
+#define IRQ_EP93XX_DMAM2M1              18
+#define IRQ_EP93XX_GPIO0MUX             19
+#define IRQ_EP93XX_GPIO1MUX             20
+#define IRQ_EP93XX_GPIO2MUX             21
+#define IRQ_EP93XX_GPIO3MUX             22
+#define IRQ_EP93XX_UART1RX              23
+#define IRQ_EP93XX_UART1TX              24
+#define IRQ_EP93XX_UART2RX              25
+#define IRQ_EP93XX_UART2TX              26
+#define IRQ_EP93XX_UART3RX              27
+#define IRQ_EP93XX_UART3TX              28
+#define IRQ_EP93XX_KEY                  29
+#define IRQ_EP93XX_TOUCH                30
+#define EP93XX_VIC1_VALID_IRQ_MASK      0x7ffffffc
+
+#define IRQ_EP93XX_EXT0                 32
+#define IRQ_EP93XX_EXT1                 33
+#define IRQ_EP93XX_EXT2                 34
+#define IRQ_EP93XX_64HZ                 35
+#define IRQ_EP93XX_WATCHDOG             36
+#define IRQ_EP93XX_RTC                  37
+#define IRQ_EP93XX_IRDA                 38
+#define IRQ_EP93XX_ETHERNET             39
+#define IRQ_EP93XX_EXT3                 40
+#define IRQ_EP93XX_PROG                 41
+#define IRQ_EP93XX_1HZ                  42
+#define IRQ_EP93XX_VSYNC                43
+#define IRQ_EP93XX_VIDEO_FIFO           44
+#define IRQ_EP93XX_SSP1RX               45
+#define IRQ_EP93XX_SSP1TX               46
+#define IRQ_EP93XX_GPIO4MUX             47
+#define IRQ_EP93XX_GPIO5MUX             48
+#define IRQ_EP93XX_GPIO6MUX             49
+#define IRQ_EP93XX_GPIO7MUX             50
+#define IRQ_EP93XX_TIMER3               51
+#define IRQ_EP93XX_UART1                52
+#define IRQ_EP93XX_SSP                  53
+#define IRQ_EP93XX_UART2                54
+#define IRQ_EP93XX_UART3                55
+#define IRQ_EP93XX_USB                  56
+#define IRQ_EP93XX_ETHERNET_PME         57
+#define IRQ_EP93XX_DSP                  58
+#define IRQ_EP93XX_GPIO_AB              59
+#define IRQ_EP93XX_SAI                  60
+#define EP93XX_VIC2_VALID_IRQ_MASK      0x1fffffff
+
+#define NR_EP93XX_IRQS                  (64 + 24)
+
+#define EP93XX_BOARD_IRQ(x)             (NR_EP93XX_IRQS + (x))
+#define EP93XX_BOARD_IRQS               32
+
+#define NR_IRQS                         (NR_EP93XX_IRQS + EP93XX_BOARD_IRQS)
+
+
+#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/memory.h b/arch/arm/mach-ep93xx/include/mach/memory.h
new file mode 100644
index 000000000000..f1b633590752
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/memory.h
@@ -0,0 +1,14 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/memory.h
+ */
+
+#ifndef __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H
+
+#define PHYS_OFFSET             UL(0x00000000)
+
+#define __bus_to_virt(x)        __phys_to_virt(x)
+#define __virt_to_bus(x)        __virt_to_phys(x)
+
+
+#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/platform.h b/arch/arm/mach-ep93xx/include/mach/platform.h
new file mode 100644
index 000000000000..b5c182473f5d
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/platform.h
@@ -0,0 +1,20 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/platform.h
+ */
+
+#ifndef __ASSEMBLY__
+
+void ep93xx_map_io(void);
+void ep93xx_init_irq(void);
+void ep93xx_init_time(unsigned long);
+void ep93xx_init_devices(void);
+extern struct sys_timer ep93xx_timer;
+
+struct ep93xx_eth_data
+{
+        unsigned char   dev_addr[6];
+        unsigned char   phy_id;
+};
+
+
+#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h
new file mode 100644
index 000000000000..67789d0f329e
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/system.h
@@ -0,0 +1,26 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/system.h
+ */
+
+#include <mach/hardware.h>
+
+static inline void arch_idle(void)
+{
+        cpu_do_idle();
+}
+
+static inline void arch_reset(char mode)
+{
+        u32 devicecfg;
+
+        local_irq_disable();
+
+        devicecfg = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
+        __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
+        __raw_writel(devicecfg | 0x80000000, EP93XX_SYSCON_DEVICE_CONFIG);
+        __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
+        __raw_writel(devicecfg & ~0x80000000, EP93XX_SYSCON_DEVICE_CONFIG);
+
+        while (1)
+                ;
+}
diff --git a/arch/arm/mach-ep93xx/include/mach/timex.h b/arch/arm/mach-ep93xx/include/mach/timex.h
new file mode 100644
index 000000000000..6b3503b01fa6
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/timex.h
@@ -0,0 +1,5 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/timex.h
+ */
+
+#define CLOCK_TICK_RATE         983040
diff --git a/arch/arm/mach-ep93xx/include/mach/ts72xx.h b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
new file mode 100644
index 000000000000..30b318aa1a1f
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/ts72xx.h
@@ -0,0 +1,101 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/ts72xx.h
+ */
+
+/*
+ * TS72xx memory map:
+ *
+ * virt         phys            size
+ * febff000     22000000        4K      model number register
+ * febfe000     22400000        4K      options register
+ * febfd000     22800000        4K      options register #2
+ * febfc000     [67]0000000     4K      NAND data register
+ * febfb000     [67]0400000     4K      NAND control register
+ * febfa000     [67]0800000     4K      NAND busy register
+ * febf9000     10800000        4K      TS-5620 RTC index register
+ * febf8000     11700000        4K      TS-5620 RTC data register
+ */
+
+#define TS72XX_MODEL_PHYS_BASE          0x22000000
+#define TS72XX_MODEL_VIRT_BASE          0xfebff000
+#define TS72XX_MODEL_SIZE               0x00001000
+
+#define TS72XX_MODEL_TS7200             0x00
+#define TS72XX_MODEL_TS7250             0x01
+#define TS72XX_MODEL_TS7260             0x02
+
+
+#define TS72XX_OPTIONS_PHYS_BASE        0x22400000
+#define TS72XX_OPTIONS_VIRT_BASE        0xfebfe000
+#define TS72XX_OPTIONS_SIZE             0x00001000
+
+#define TS72XX_OPTIONS_COM2_RS485       0x02
+#define TS72XX_OPTIONS_MAX197           0x01
+
+
+#define TS72XX_OPTIONS2_PHYS_BASE       0x22800000
+#define TS72XX_OPTIONS2_VIRT_BASE       0xfebfd000
+#define TS72XX_OPTIONS2_SIZE            0x00001000
+
+#define TS72XX_OPTIONS2_TS9420          0x04
+#define TS72XX_OPTIONS2_TS9420_BOOT     0x02
+
+
+#define TS72XX_NOR_PHYS_BASE            0x60000000
+#define TS72XX_NOR2_PHYS_BASE           0x62000000
+
+#define TS72XX_NAND1_DATA_PHYS_BASE     0x60000000
+#define TS72XX_NAND2_DATA_PHYS_BASE     0x70000000
+#define TS72XX_NAND_DATA_VIRT_BASE      0xfebfc000
+#define TS72XX_NAND_DATA_SIZE           0x00001000
+
+#define TS72XX_NAND1_CONTROL_PHYS_BASE  0x60400000
+#define TS72XX_NAND2_CONTROL_PHYS_BASE  0x70400000
+#define TS72XX_NAND_CONTROL_VIRT_BASE   0xfebfb000
+#define TS72XX_NAND_CONTROL_SIZE        0x00001000
+
+#define TS72XX_NAND1_BUSY_PHYS_BASE     0x60800000
+#define TS72XX_NAND2_BUSY_PHYS_BASE     0x70800000
+#define TS72XX_NAND_BUSY_VIRT_BASE      0xfebfa000
+#define TS72XX_NAND_BUSY_SIZE           0x00001000
+
+
+#define TS72XX_RTC_INDEX_VIRT_BASE      0xfebf9000
+#define TS72XX_RTC_INDEX_PHYS_BASE      0x10800000
+#define TS72XX_RTC_INDEX_SIZE           0x00001000
+
+#define TS72XX_RTC_DATA_VIRT_BASE       0xfebf8000
+#define TS72XX_RTC_DATA_PHYS_BASE       0x11700000
+#define TS72XX_RTC_DATA_SIZE            0x00001000
+
+
+#ifndef __ASSEMBLY__
+#include <asm/io.h>
+
+static inline int board_is_ts7200(void)
+{
+        return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7200;
+}
+
+static inline int board_is_ts7250(void)
+{
+        return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7250;
+}
+
+static inline int board_is_ts7260(void)
+{
+        return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7260;
+}
+
+static inline int is_max197_installed(void)
+{
+        return !!(__raw_readb(TS72XX_OPTIONS_VIRT_BASE) &
+                                        TS72XX_OPTIONS_MAX197);
+}
+
+static inline int is_ts9420_installed(void)
+{
+        return !!(__raw_readb(TS72XX_OPTIONS2_VIRT_BASE) &
+                                        TS72XX_OPTIONS2_TS9420);
+}
+#endif
diff --git a/arch/arm/mach-ep93xx/include/mach/uncompress.h b/arch/arm/mach-ep93xx/include/mach/uncompress.h
new file mode 100644
index 000000000000..1fd2f17de325
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/uncompress.h
@@ -0,0 +1,85 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/uncompress.h
+ *
+ * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+
+#include <mach/ep93xx-regs.h>
+
+static unsigned char __raw_readb(unsigned int ptr)
+{
+        return *((volatile unsigned char *)ptr);
+}
+
+static unsigned int __raw_readl(unsigned int ptr)
+{
+        return *((volatile unsigned int *)ptr);
+}
+
+static void __raw_writeb(unsigned char value, unsigned int ptr)
+{
+        *((volatile unsigned char *)ptr) = value;
+}
+
+static void __raw_writel(unsigned int value, unsigned int ptr)
+{
+        *((volatile unsigned int *)ptr) = value;
+}
+
+
+#define PHYS_UART1_DATA         0x808c0000
+#define PHYS_UART1_FLAG         0x808c0018
+#define UART1_FLAG_TXFF         0x20
+
+static inline void putc(int c)
+{
+        int i;
+
+        for (i = 0; i < 1000; i++) {
+                /* Transmit fifo not full?  */
+                if (!(__raw_readb(PHYS_UART1_FLAG) & UART1_FLAG_TXFF))
+                        break;
+        }
+
+        __raw_writeb(c, PHYS_UART1_DATA);
+}
+
+static inline void flush(void)
+{
+}
+
+
+/*
+ * Some bootloaders don't turn off DMA from the ethernet MAC before
+ * jumping to linux, which means that we might end up with bits of RX
+ * status and packet data scribbled over the uncompressed kernel image.
+ * Work around this by resetting the ethernet MAC before we uncompress.
+ */
+#define PHYS_ETH_SELF_CTL               0x80010020
+#define ETH_SELF_CTL_RESET              0x00000001
+
+static void ethernet_reset(void)
+{
+        unsigned int v;
+
+        /* Reset the ethernet MAC.  */
+        v = __raw_readl(PHYS_ETH_SELF_CTL);
+        __raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL);
+
+        /* Wait for reset to finish.  */
+        while (__raw_readl(PHYS_ETH_SELF_CTL) & ETH_SELF_CTL_RESET)
+                ;
+}
+
+
+static void arch_decomp_setup(void)
+{
+        ethernet_reset();
+}
+
+#define arch_decomp_wdog()
diff --git a/arch/arm/mach-ep93xx/include/mach/vmalloc.h b/arch/arm/mach-ep93xx/include/mach/vmalloc.h
new file mode 100644
index 000000000000..aed21cd3fe2d
--- /dev/null
+++ b/arch/arm/mach-ep93xx/include/mach/vmalloc.h
@@ -0,0 +1,5 @@
+/*
+ * arch/arm/mach-ep93xx/include/mach/vmalloc.h
+ */
+
+#define VMALLOC_END     0xfe800000
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index 4d831ba799d5..de047a5c8112 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -20,7 +20,7 @@
 #include <linux/mtd/physmap.h>
 
 #include <asm/io.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 
 #include <asm/mach/arch.h>
 #include <asm/mach-types.h>
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index c0bc642a5c18..c3cbff126d0c 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -20,7 +20,7 @@
 #include <linux/platform_device.h>
 #include <linux/m48t86.h>
 #include <asm/io.h>
-#include <asm/arch/hardware.h>
+#include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/map.h>