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authorLennert Buytenhek <buytenh@wantstofly.org>2006-03-20 12:10:13 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-03-21 17:06:11 -0500
commite7736d47a11a771ba87314be563b2cb6b8d11d14 (patch)
tree21f27b7311a5298b9295b1e4b229eec190bfd23c /arch/arm/mach-ep93xx
parent73deb7dc05b4cf968e506e7b18345bc65bcbc0f3 (diff)
[ARM] 3369/1: ep93xx: add core cirrus ep93xx support
Patch from Lennert Buytenhek This patch adds support for the Cirrus ep93xx series of CPUs. The ep93xx is an ARM920T based CPU with two VICs, PL010 based UARTs, IrDA, MaverickCrunch floating point coprocessor, between 24 and 64 GPIOs, ethernet, OHCI USB and, depending on the model, pcmcia, raster engine, graphics accelerator, IDE controller and a bunch of other stuff. This patch adds the core ep93xx support code, and support for the Glomation GESBC-9312-sx and the Technologic Systems TS-72xx SBCs. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-ep93xx')
-rw-r--r--arch/arm/mach-ep93xx/Kconfig21
-rw-r--r--arch/arm/mach-ep93xx/Makefile10
-rw-r--r--arch/arm/mach-ep93xx/Makefile.boot2
-rw-r--r--arch/arm/mach-ep93xx/core.c173
-rw-r--r--arch/arm/mach-ep93xx/gesbc9312.c40
-rw-r--r--arch/arm/mach-ep93xx/ts72xx.c118
6 files changed, 364 insertions, 0 deletions
diff --git a/arch/arm/mach-ep93xx/Kconfig b/arch/arm/mach-ep93xx/Kconfig
new file mode 100644
index 000000000000..cec5a21ca4e3
--- /dev/null
+++ b/arch/arm/mach-ep93xx/Kconfig
@@ -0,0 +1,21 @@
1if ARCH_EP93XX
2
3menu "Cirrus EP93xx Implementation Options"
4
5comment "EP93xx Platforms"
6
7config MACH_GESBC9312
8 bool "Support Glomation GESBC-9312-sx"
9 help
10 Say 'Y' here if you want your kernel to support the Glomation
11 GESBC-9312-sx board.
12
13config MACH_TS72XX
14 bool "Support Technologic Systems TS-72xx SBC"
15 help
16 Say 'Y' here if you want your kernel to support the
17 Technologic Systems TS-72xx board.
18
19endmenu
20
21endif
diff --git a/arch/arm/mach-ep93xx/Makefile b/arch/arm/mach-ep93xx/Makefile
new file mode 100644
index 000000000000..5393af989e94
--- /dev/null
+++ b/arch/arm/mach-ep93xx/Makefile
@@ -0,0 +1,10 @@
1#
2# Makefile for the linux kernel.
3#
4obj-y := core.o
5obj-m :=
6obj-n :=
7obj- :=
8
9obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o
10obj-$(CONFIG_MACH_TS72XX) += ts72xx.o
diff --git a/arch/arm/mach-ep93xx/Makefile.boot b/arch/arm/mach-ep93xx/Makefile.boot
new file mode 100644
index 000000000000..d5561ad15bad
--- /dev/null
+++ b/arch/arm/mach-ep93xx/Makefile.boot
@@ -0,0 +1,2 @@
1 zreladdr-y := 0x00008000
2params_phys-y := 0x00000100
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
new file mode 100644
index 000000000000..f831f74dc8cc
--- /dev/null
+++ b/arch/arm/mach-ep93xx/core.c
@@ -0,0 +1,173 @@
1/*
2 * arch/arm/mach-ep93xx/core.c
3 * Core routines for Cirrus EP93xx chips.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * Thanks go to Michael Burian and Ray Lehtiniemi for their key
8 * role in the ep93xx linux community.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 */
15
16#include <linux/config.h>
17#include <linux/kernel.h>
18#include <linux/init.h>
19#include <linux/spinlock.h>
20#include <linux/sched.h>
21#include <linux/interrupt.h>
22#include <linux/serial.h>
23#include <linux/tty.h>
24#include <linux/bitops.h>
25#include <linux/serial.h>
26#include <linux/serial_8250.h>
27#include <linux/serial_core.h>
28#include <linux/device.h>
29#include <linux/mm.h>
30#include <linux/time.h>
31#include <linux/timex.h>
32#include <linux/delay.h>
33#include <linux/amba/bus.h>
34
35#include <asm/types.h>
36#include <asm/setup.h>
37#include <asm/memory.h>
38#include <asm/hardware.h>
39#include <asm/irq.h>
40#include <asm/system.h>
41#include <asm/tlbflush.h>
42#include <asm/pgtable.h>
43#include <asm/io.h>
44
45#include <asm/mach/map.h>
46#include <asm/mach/time.h>
47#include <asm/mach/irq.h>
48
49#include <asm/hardware/vic.h>
50
51
52/*************************************************************************
53 * Static I/O mappings that are needed for all EP93xx platforms
54 *************************************************************************/
55static struct map_desc ep93xx_io_desc[] __initdata = {
56 {
57 .virtual = EP93XX_AHB_VIRT_BASE,
58 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
59 .length = EP93XX_AHB_SIZE,
60 .type = MT_DEVICE,
61 }, {
62 .virtual = EP93XX_APB_VIRT_BASE,
63 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
64 .length = EP93XX_APB_SIZE,
65 .type = MT_DEVICE,
66 },
67};
68
69void __init ep93xx_map_io(void)
70{
71 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
72}
73
74
75/*************************************************************************
76 * Timer handling for EP93xx
77 *************************************************************************
78 * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
79 * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
80 * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
81 * is free-running, and can't generate interrupts.
82 *
83 * The 508 kHz timers are ideal for use for the timer interrupt, as the
84 * most common values of HZ divide 508 kHz nicely. We pick one of the 16
85 * bit timers (timer 1) since we don't need more than 16 bits of reload
86 * value as long as HZ >= 8.
87 *
88 * The higher clock rate of timer 4 makes it a better choice than the
89 * other timers for use in gettimeoffset(), while the fact that it can't
90 * generate interrupts means we don't have to worry about not being able
91 * to use this timer for something else. We also use timer 4 for keeping
92 * track of lost jiffies.
93 */
94static unsigned int last_jiffy_time;
95
96#define TIMER4_TICKS_PER_JIFFY ((CLOCK_TICK_RATE + (HZ/2)) / HZ)
97
98static int ep93xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
99{
100 write_seqlock(&xtime_lock);
101
102 __raw_writel(1, EP93XX_TIMER1_CLEAR);
103 while (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time
104 >= TIMER4_TICKS_PER_JIFFY) {
105 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
106 timer_tick(regs);
107 }
108
109 write_sequnlock(&xtime_lock);
110
111 return IRQ_HANDLED;
112}
113
114static struct irqaction ep93xx_timer_irq = {
115 .name = "ep93xx timer",
116 .flags = SA_INTERRUPT | SA_TIMER,
117 .handler = ep93xx_timer_interrupt,
118};
119
120static void __init ep93xx_timer_init(void)
121{
122 /* Enable periodic HZ timer. */
123 __raw_writel(0x48, EP93XX_TIMER1_CONTROL);
124 __raw_writel((508000 / HZ) - 1, EP93XX_TIMER1_LOAD);
125 __raw_writel(0xc8, EP93XX_TIMER1_CONTROL);
126
127 /* Enable lost jiffy timer. */
128 __raw_writel(0x100, EP93XX_TIMER4_VALUE_HIGH);
129
130 setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
131}
132
133static unsigned long ep93xx_gettimeoffset(void)
134{
135 int offset;
136
137 offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
138
139 /* Calculate (1000000 / 983040) * offset. */
140 return offset + (53 * offset / 3072);
141}
142
143struct sys_timer ep93xx_timer = {
144 .init = ep93xx_timer_init,
145 .offset = ep93xx_gettimeoffset,
146};
147
148
149/*************************************************************************
150 * EP93xx IRQ handling
151 *************************************************************************/
152void __init ep93xx_init_irq(void)
153{
154 vic_init((void *)EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK);
155 vic_init((void *)EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK);
156}
157
158
159/*************************************************************************
160 * EP93xx peripheral handling
161 *************************************************************************/
162void __init ep93xx_init_devices(void)
163{
164 unsigned int v;
165
166 /*
167 * Disallow access to MaverickCrunch initially.
168 */
169 v = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
170 v &= ~EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE;
171 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
172 __raw_writel(v, EP93XX_SYSCON_DEVICE_CONFIG);
173}
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
new file mode 100644
index 000000000000..d18fcb1a2f1b
--- /dev/null
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -0,0 +1,40 @@
1/*
2 * arch/arm/mach-ep93xx/gesbc9312.c
3 * Glomation GESBC-9312-sx support.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12
13#include <linux/config.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/mm.h>
17#include <linux/sched.h>
18#include <linux/interrupt.h>
19#include <linux/mtd/physmap.h>
20#include <asm/io.h>
21#include <asm/hardware.h>
22#include <asm/mach-types.h>
23#include <asm/mach/arch.h>
24
25static void __init gesbc9312_init_machine(void)
26{
27 ep93xx_init_devices();
28 physmap_configure(0x60000000, 0x00800000, 4, NULL);
29}
30
31MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
32 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
33 .phys_io = EP93XX_APB_PHYS_BASE,
34 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
35 .boot_params = 0x00000100,
36 .map_io = ep93xx_map_io,
37 .init_irq = ep93xx_init_irq,
38 .timer = &ep93xx_timer,
39 .init_machine = gesbc9312_init_machine,
40MACHINE_END
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
new file mode 100644
index 000000000000..777e75daa8a5
--- /dev/null
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -0,0 +1,118 @@
1/*
2 * arch/arm/mach-ep93xx/ts72xx.c
3 * Technologic Systems TS72xx SBC support.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or (at
10 * your option) any later version.
11 */
12
13#include <linux/config.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/mm.h>
17#include <linux/sched.h>
18#include <linux/interrupt.h>
19#include <linux/mtd/physmap.h>
20#include <asm/io.h>
21#include <asm/hardware.h>
22#include <asm/mach-types.h>
23#include <asm/mach/arch.h>
24#include <asm/mach/map.h>
25
26static struct map_desc ts72xx_io_desc[] __initdata = {
27 {
28 .virtual = TS72XX_MODEL_VIRT_BASE,
29 .pfn = __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
30 .length = TS72XX_MODEL_SIZE,
31 .type = MT_DEVICE,
32 }, {
33 .virtual = TS72XX_OPTIONS_VIRT_BASE,
34 .pfn = __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
35 .length = TS72XX_OPTIONS_SIZE,
36 .type = MT_DEVICE,
37 }, {
38 .virtual = TS72XX_OPTIONS2_VIRT_BASE,
39 .pfn = __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
40 .length = TS72XX_OPTIONS2_SIZE,
41 .type = MT_DEVICE,
42 }
43};
44
45static struct map_desc ts72xx_nand_io_desc[] __initdata = {
46 {
47 .virtual = TS72XX_NAND_DATA_VIRT_BASE,
48 .pfn = __phys_to_pfn(TS72XX_NAND1_DATA_PHYS_BASE),
49 .length = TS72XX_NAND_DATA_SIZE,
50 .type = MT_DEVICE,
51 }, {
52 .virtual = TS72XX_NAND_CONTROL_VIRT_BASE,
53 .pfn = __phys_to_pfn(TS72XX_NAND1_CONTROL_PHYS_BASE),
54 .length = TS72XX_NAND_CONTROL_SIZE,
55 .type = MT_DEVICE,
56 }, {
57 .virtual = TS72XX_NAND_BUSY_VIRT_BASE,
58 .pfn = __phys_to_pfn(TS72XX_NAND1_BUSY_PHYS_BASE),
59 .length = TS72XX_NAND_BUSY_SIZE,
60 .type = MT_DEVICE,
61 }
62};
63
64static struct map_desc ts72xx_alternate_nand_io_desc[] __initdata = {
65 {
66 .virtual = TS72XX_NAND_DATA_VIRT_BASE,
67 .pfn = __phys_to_pfn(TS72XX_NAND2_DATA_PHYS_BASE),
68 .length = TS72XX_NAND_DATA_SIZE,
69 .type = MT_DEVICE,
70 }, {
71 .virtual = TS72XX_NAND_CONTROL_VIRT_BASE,
72 .pfn = __phys_to_pfn(TS72XX_NAND2_CONTROL_PHYS_BASE),
73 .length = TS72XX_NAND_CONTROL_SIZE,
74 .type = MT_DEVICE,
75 }, {
76 .virtual = TS72XX_NAND_BUSY_VIRT_BASE,
77 .pfn = __phys_to_pfn(TS72XX_NAND2_BUSY_PHYS_BASE),
78 .length = TS72XX_NAND_BUSY_SIZE,
79 .type = MT_DEVICE,
80 }
81};
82
83static void __init ts72xx_map_io(void)
84{
85 ep93xx_map_io();
86 iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
87
88 /*
89 * The TS-7200 has NOR flash, the other models have NAND flash.
90 */
91 if (!board_is_ts7200()) {
92 if (is_ts9420_installed()) {
93 iotable_init(ts72xx_alternate_nand_io_desc,
94 ARRAY_SIZE(ts72xx_alternate_nand_io_desc));
95 } else {
96 iotable_init(ts72xx_nand_io_desc,
97 ARRAY_SIZE(ts72xx_nand_io_desc));
98 }
99 }
100}
101
102static void __init ts72xx_init_machine(void)
103{
104 ep93xx_init_devices();
105 if (board_is_ts7200())
106 physmap_configure(TS72XX_NOR_PHYS_BASE, 0x01000000, 1, NULL);
107}
108
109MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
110 /* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
111 .phys_io = EP93XX_APB_PHYS_BASE,
112 .io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
113 .boot_params = 0x00000100,
114 .map_io = ts72xx_map_io,
115 .init_irq = ep93xx_init_irq,
116 .timer = &ep93xx_timer,
117 .init_machine = ts72xx_init_machine,
118MACHINE_END