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authorThomas Gleixner <tglx@linutronix.de>2011-03-24 08:25:22 -0400
committerThomas Gleixner <tglx@linutronix.de>2011-03-29 08:47:57 -0400
commit6845664a6a7d443f03883db59d10749d38d98b8e (patch)
tree4b4499f4d41f24152190220d93ea186fbf991fca /arch/arm/mach-ep93xx/gpio.c
parent25a5662a13e604d86b0a9fd71703582a7393d8ec (diff)
arm: Cleanup the irq namespace
Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/arm/mach-ep93xx/gpio.c')
-rw-r--r--arch/arm/mach-ep93xx/gpio.c31
1 files changed, 20 insertions, 11 deletions
diff --git a/arch/arm/mach-ep93xx/gpio.c b/arch/arm/mach-ep93xx/gpio.c
index 6e7bbf72b36b..7da0a5cefa5f 100644
--- a/arch/arm/mach-ep93xx/gpio.c
+++ b/arch/arm/mach-ep93xx/gpio.c
@@ -231,20 +231,29 @@ void __init ep93xx_gpio_init_irq(void)
231 231
232 for (gpio_irq = gpio_to_irq(0); 232 for (gpio_irq = gpio_to_irq(0);
233 gpio_irq <= gpio_to_irq(EP93XX_GPIO_LINE_MAX_IRQ); ++gpio_irq) { 233 gpio_irq <= gpio_to_irq(EP93XX_GPIO_LINE_MAX_IRQ); ++gpio_irq) {
234 set_irq_chip(gpio_irq, &ep93xx_gpio_irq_chip); 234 irq_set_chip(gpio_irq, &ep93xx_gpio_irq_chip);
235 set_irq_handler(gpio_irq, handle_level_irq); 235 irq_set_handler(gpio_irq, handle_level_irq);
236 set_irq_flags(gpio_irq, IRQF_VALID); 236 set_irq_flags(gpio_irq, IRQF_VALID);
237 } 237 }
238 238
239 set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler); 239 irq_set_chained_handler(IRQ_EP93XX_GPIO_AB,
240 set_irq_chained_handler(IRQ_EP93XX_GPIO0MUX, ep93xx_gpio_f_irq_handler); 240 ep93xx_gpio_ab_irq_handler);
241 set_irq_chained_handler(IRQ_EP93XX_GPIO1MUX, ep93xx_gpio_f_irq_handler); 241 irq_set_chained_handler(IRQ_EP93XX_GPIO0MUX,
242 set_irq_chained_handler(IRQ_EP93XX_GPIO2MUX, ep93xx_gpio_f_irq_handler); 242 ep93xx_gpio_f_irq_handler);
243 set_irq_chained_handler(IRQ_EP93XX_GPIO3MUX, ep93xx_gpio_f_irq_handler); 243 irq_set_chained_handler(IRQ_EP93XX_GPIO1MUX,
244 set_irq_chained_handler(IRQ_EP93XX_GPIO4MUX, ep93xx_gpio_f_irq_handler); 244 ep93xx_gpio_f_irq_handler);
245 set_irq_chained_handler(IRQ_EP93XX_GPIO5MUX, ep93xx_gpio_f_irq_handler); 245 irq_set_chained_handler(IRQ_EP93XX_GPIO2MUX,
246 set_irq_chained_handler(IRQ_EP93XX_GPIO6MUX, ep93xx_gpio_f_irq_handler); 246 ep93xx_gpio_f_irq_handler);
247 set_irq_chained_handler(IRQ_EP93XX_GPIO7MUX, ep93xx_gpio_f_irq_handler); 247 irq_set_chained_handler(IRQ_EP93XX_GPIO3MUX,
248 ep93xx_gpio_f_irq_handler);
249 irq_set_chained_handler(IRQ_EP93XX_GPIO4MUX,
250 ep93xx_gpio_f_irq_handler);
251 irq_set_chained_handler(IRQ_EP93XX_GPIO5MUX,
252 ep93xx_gpio_f_irq_handler);
253 irq_set_chained_handler(IRQ_EP93XX_GPIO6MUX,
254 ep93xx_gpio_f_irq_handler);
255 irq_set_chained_handler(IRQ_EP93XX_GPIO7MUX,
256 ep93xx_gpio_f_irq_handler);
248} 257}
249 258
250 259