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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-02-25 17:10:38 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-02-25 17:10:38 -0500
commit9f33be2c3a80bdc2cc08342dd77fac87652e0548 (patch)
tree7ad6e825427a15c5ec0fc15540abc0429d7f4bce /arch/arm/mach-ep93xx/clock.c
parent2741ecb4ce5c2d430b5c44b0a169038338c21df5 (diff)
parenteed18b5fa4d297c681b00144e8c6942dd35d39a7 (diff)
Merge branches 'clks' and 'pnx' into devel
Diffstat (limited to 'arch/arm/mach-ep93xx/clock.c')
-rw-r--r--arch/arm/mach-ep93xx/clock.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/mach-ep93xx/clock.c b/arch/arm/mach-ep93xx/clock.c
index 49fa9f8fef4a..5f80092b6ace 100644
--- a/arch/arm/mach-ep93xx/clock.c
+++ b/arch/arm/mach-ep93xx/clock.c
@@ -447,7 +447,6 @@ static void __init ep93xx_dma_clock_init(void)
447static int __init ep93xx_clock_init(void) 447static int __init ep93xx_clock_init(void)
448{ 448{
449 u32 value; 449 u32 value;
450 int i;
451 450
452 /* Determine the bootloader configured pll1 rate */ 451 /* Determine the bootloader configured pll1 rate */
453 value = __raw_readl(EP93XX_SYSCON_CLKSET1); 452 value = __raw_readl(EP93XX_SYSCON_CLKSET1);
@@ -480,8 +479,7 @@ static int __init ep93xx_clock_init(void)
480 clk_f.rate / 1000000, clk_h.rate / 1000000, 479 clk_f.rate / 1000000, clk_h.rate / 1000000,
481 clk_p.rate / 1000000); 480 clk_p.rate / 1000000);
482 481
483 for (i = 0; i < ARRAY_SIZE(clocks); i++) 482 clkdev_add_table(clocks, ARRAY_SIZE(clocks));
484 clkdev_add(&clocks[i]);
485 return 0; 483 return 0;
486} 484}
487arch_initcall(ep93xx_clock_init); 485arch_initcall(ep93xx_clock_init);