ARM: Remove dependency of plat-orion GPIO code on mach directory includes.

This patch makes the various mach dirs that use the plat-orion GPIO
code pass in GPIO-related platform info (GPIO controller base address,
secondary base IRQ number, etc) explicitly, instead of having
plat-orion get those values by including a mach dir include file --
the latter mechanism is problematic if you want to support multiple
ARM platforms in the same kernel image.

Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>

1 files changed, 14 insertions, 16 deletions

diff --git a/arch/arm/mach-dove/irq.c b/arch/arm/mach-dove/irq.c
index 9317f0558b57..101707fa2e2c 100644
--- a/arch/arm/mach-dove/irq.c
+++ b/arch/arm/mach-dove/irq.c
@@ -99,11 +99,21 @@ void __init dove_init_irq(void)
         orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
 
         /*
-         * Mask and clear GPIO IRQ interrupts.
+         * Initialize gpiolib for GPIOs 0-71.
          */
-        writel(0, GPIO_LEVEL_MASK(0));
-        writel(0, GPIO_EDGE_MASK(0));
-        writel(0, GPIO_EDGE_CAUSE(0));
+        orion_gpio_init(0, 32, DOVE_GPIO_LO_VIRT_BASE, 0,
+                        IRQ_DOVE_GPIO_START);
+        set_irq_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler);
+        set_irq_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler);
+        set_irq_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler);
+        set_irq_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler);
+
+        orion_gpio_init(32, 32, DOVE_GPIO_HI_VIRT_BASE, 0,
+                        IRQ_DOVE_GPIO_START + 32);
+        set_irq_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler);
+
+        orion_gpio_init(64, 8, DOVE_GPIO2_VIRT_BASE, 0,
+                        IRQ_DOVE_GPIO_START + 64);
 
         /*
          * Mask and clear PMU interrupts
@@ -111,18 +121,6 @@ void __init dove_init_irq(void)
         writel(0, PMU_INTERRUPT_MASK);
         writel(0, PMU_INTERRUPT_CAUSE);
 
-        for (i = IRQ_DOVE_GPIO_START; i < IRQ_DOVE_PMU_START; i++) {
-                set_irq_chip(i, &orion_gpio_irq_chip);
-                set_irq_handler(i, handle_level_irq);
-                irq_desc[i].status |= IRQ_LEVEL;
-                set_irq_flags(i, IRQF_VALID);
-        }
-        set_irq_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler);
-        set_irq_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler);
-
         for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) {
                 set_irq_chip(i, &pmu_irq_chip);
                 set_irq_handler(i, handle_level_irq);