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authorLinus Torvalds <torvalds@linux-foundation.org>2011-03-17 22:08:06 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-03-17 22:08:06 -0400
commit411f5c7a502769ccc0377c5ba36cb0b283847ba8 (patch)
tree2c3a29671e3f923de48c55f94194849264a7bf53 /arch/arm/mach-dove/include
parent6d7ed21d17e640b120b902a314143e5ef4917a70 (diff)
parent9ced9f03d12d7539e86b0bff5bc750153c976c34 (diff)
Merge branch 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel-stable' of master.kernel.org:/home/rmk/linux-2.6-arm: (289 commits) davinci: DM644x EVM: register MUSB device earlier davinci: add spi devices on tnetv107x evm davinci: add ssp config for tnetv107x evm board davinci: add tnetv107x ssp platform device spi: add ti-ssp spi master driver mfd: add driver for sequencer serial port ARM: EXYNOS4: Implement Clock gating for System MMU ARM: EXYNOS4: Enhancement of System MMU driver ARM: EXYNOS4: Add support for gpio interrupts ARM: S5P: Add function to register gpio interrupt bank data ARM: S5P: Cleanup S5P gpio interrupt code ARM: EXYNOS4: Add missing GPYx banks ARM: S3C64XX: Fix section mismatch from cpufreq init ARM: EXYNOS4: Add keypad device to the SMDKV310 ARM: EXYNOS4: Update clocks for keypad ARM: EXYNOS4: Update keypad base address ARM: EXYNOS4: Add keypad device helpers ARM: EXYNOS4: Add support for SATA on ARMLEX4210 plat-nomadik: make GPIO interrupts work with cpuidle ApSleep mach-u300: define a dummy filter function for coh901318 ... Fix up various conflicts in - arch/arm/mach-exynos4/cpufreq.c - arch/arm/mach-mxs/gpio.c - drivers/net/Kconfig - drivers/tty/serial/Kconfig - drivers/tty/serial/Makefile - drivers/usb/gadget/fsl_mxc_udc.c - drivers/video/Kconfig
Diffstat (limited to 'arch/arm/mach-dove/include')
-rw-r--r--arch/arm/mach-dove/include/mach/bridge-regs.h4
-rw-r--r--arch/arm/mach-dove/include/mach/dove.h3
-rw-r--r--arch/arm/mach-dove/include/mach/gpio.h42
-rw-r--r--arch/arm/mach-dove/include/mach/irqs.h7
4 files changed, 3 insertions, 53 deletions
diff --git a/arch/arm/mach-dove/include/mach/bridge-regs.h b/arch/arm/mach-dove/include/mach/bridge-regs.h
index 214a4c31f069..226949dc4ac0 100644
--- a/arch/arm/mach-dove/include/mach/bridge-regs.h
+++ b/arch/arm/mach-dove/include/mach/bridge-regs.h
@@ -26,10 +26,6 @@
26#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) 26#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c)
27#define SOFT_RESET 0x00000001 27#define SOFT_RESET 0x00000001
28 28
29#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110)
30#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114)
31#define BRIDGE_INT_TIMER0 0x0002
32#define BRIDGE_INT_TIMER1 0x0004
33#define BRIDGE_INT_TIMER1_CLR (~0x0004) 29#define BRIDGE_INT_TIMER1_CLR (~0x0004)
34 30
35#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) 31#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h
index 27b414578f2e..e5fcdd3f5bf5 100644
--- a/arch/arm/mach-dove/include/mach/dove.h
+++ b/arch/arm/mach-dove/include/mach/dove.h
@@ -130,7 +130,8 @@
130#define DOVE_PMU_MPP_GENERAL_CTRL (DOVE_MPP_VIRT_BASE + 0x10) 130#define DOVE_PMU_MPP_GENERAL_CTRL (DOVE_MPP_VIRT_BASE + 0x10)
131#define DOVE_RESET_SAMPLE_LO (DOVE_MPP_VIRT_BASE | 0x014) 131#define DOVE_RESET_SAMPLE_LO (DOVE_MPP_VIRT_BASE | 0x014)
132#define DOVE_RESET_SAMPLE_HI (DOVE_MPP_VIRT_BASE | 0x018) 132#define DOVE_RESET_SAMPLE_HI (DOVE_MPP_VIRT_BASE | 0x018)
133#define DOVE_GPIO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0400) 133#define DOVE_GPIO_LO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0400)
134#define DOVE_GPIO_HI_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0420)
134#define DOVE_GPIO2_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe8400) 135#define DOVE_GPIO2_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe8400)
135#define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe803c) 136#define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe803c)
136#define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1) 137#define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1)
diff --git a/arch/arm/mach-dove/include/mach/gpio.h b/arch/arm/mach-dove/include/mach/gpio.h
index 340bb7af529d..e7e5101e35a5 100644
--- a/arch/arm/mach-dove/include/mach/gpio.h
+++ b/arch/arm/mach-dove/include/mach/gpio.h
@@ -6,46 +6,4 @@
6 * warranty of any kind, whether express or implied. 6 * warranty of any kind, whether express or implied.
7 */ 7 */
8 8
9#ifndef __ASM_ARCH_GPIO_H
10#define __ASM_ARCH_GPIO_H
11
12#include <asm/errno.h>
13#include <mach/irqs.h>
14#include <plat/gpio.h> 9#include <plat/gpio.h>
15#include <asm-generic/gpio.h> /* cansleep wrappers */
16
17#define GPIO_MAX 72
18
19#define GPIO_BASE_LO (DOVE_GPIO_VIRT_BASE + 0x00)
20#define GPIO_BASE_HI (DOVE_GPIO_VIRT_BASE + 0x20)
21
22#define GPIO_BASE(pin) ((pin < 32) ? GPIO_BASE_LO : \
23 ((pin < 64) ? GPIO_BASE_HI : \
24 DOVE_GPIO2_VIRT_BASE))
25
26#define GPIO_OUT(pin) (GPIO_BASE(pin) + 0x00)
27#define GPIO_IO_CONF(pin) (GPIO_BASE(pin) + 0x04)
28#define GPIO_BLINK_EN(pin) (GPIO_BASE(pin) + 0x08)
29#define GPIO_IN_POL(pin) (GPIO_BASE(pin) + 0x0c)
30#define GPIO_DATA_IN(pin) (GPIO_BASE(pin) + 0x10)
31#define GPIO_EDGE_CAUSE(pin) (GPIO_BASE(pin) + 0x14)
32#define GPIO_EDGE_MASK(pin) (GPIO_BASE(pin) + 0x18)
33#define GPIO_LEVEL_MASK(pin) (GPIO_BASE(pin) + 0x1c)
34
35static inline int gpio_to_irq(int pin)
36{
37 if (pin < NR_GPIO_IRQS)
38 return pin + IRQ_DOVE_GPIO_START;
39
40 return -EINVAL;
41}
42
43static inline int irq_to_gpio(int irq)
44{
45 if (IRQ_DOVE_GPIO_START < irq && irq < NR_IRQS)
46 return irq - IRQ_DOVE_GPIO_START;
47
48 return -EINVAL;
49}
50
51#endif
diff --git a/arch/arm/mach-dove/include/mach/irqs.h b/arch/arm/mach-dove/include/mach/irqs.h
index 46681466f92b..03d401d20453 100644
--- a/arch/arm/mach-dove/include/mach/irqs.h
+++ b/arch/arm/mach-dove/include/mach/irqs.h
@@ -92,10 +92,5 @@
92 92
93#define NR_IRQS (IRQ_DOVE_PMU_START + NR_PMU_IRQS) 93#define NR_IRQS (IRQ_DOVE_PMU_START + NR_PMU_IRQS)
94 94
95/* Required for compatability with PXA AC97 driver. */ 95
96#define IRQ_AC97 IRQ_DOVE_AC97
97/* Required for compatability with PXA DMA driver. */
98#define IRQ_DMA IRQ_DOVE_PDMA
99/* Required for compatability with PXA NAND driver */
100#define IRQ_NAND IRQ_DOVE_NAND
101#endif 96#endif