diff options
author | Olof Johansson <olof@lixom.net> | 2012-10-04 23:17:25 -0400 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2012-10-04 23:17:25 -0400 |
commit | 54d69df5849ec2e660aa12ac75562618c10fb499 (patch) | |
tree | adbfb8bcc7cc73b83bf2b784fa331911ba03573a /arch/arm/mach-dove/include/mach/pm.h | |
parent | ad932bb6b549722a561fb31ac2fa50dcbcb3e36b (diff) | |
parent | 46f2007c1efadfa4071c17e75f140c47f09293de (diff) |
Merge branch 'late/kirkwood' into late/soc
Merge in the late Kirkwood branch with the OMAP late branch for upstream
submission.
Final contents described in shared tag.
Fixup remove/change conflicts in arch/arm/mach-omap2/devices.c and
drivers/spi/spi-omap2-mcspi.c.
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-dove/include/mach/pm.h')
-rw-r--r-- | arch/arm/mach-dove/include/mach/pm.h | 54 |
1 files changed, 36 insertions, 18 deletions
diff --git a/arch/arm/mach-dove/include/mach/pm.h b/arch/arm/mach-dove/include/mach/pm.h index 3ad9f946a9e8..7bcd0dfce4b1 100644 --- a/arch/arm/mach-dove/include/mach/pm.h +++ b/arch/arm/mach-dove/include/mach/pm.h | |||
@@ -13,24 +13,42 @@ | |||
13 | #include <mach/irqs.h> | 13 | #include <mach/irqs.h> |
14 | 14 | ||
15 | #define CLOCK_GATING_CONTROL (DOVE_PMU_VIRT_BASE + 0x38) | 15 | #define CLOCK_GATING_CONTROL (DOVE_PMU_VIRT_BASE + 0x38) |
16 | #define CLOCK_GATING_USB0_MASK (1 << 0) | 16 | #define CLOCK_GATING_BIT_USB0 0 |
17 | #define CLOCK_GATING_USB1_MASK (1 << 1) | 17 | #define CLOCK_GATING_BIT_USB1 1 |
18 | #define CLOCK_GATING_GBE_MASK (1 << 2) | 18 | #define CLOCK_GATING_BIT_GBE 2 |
19 | #define CLOCK_GATING_SATA_MASK (1 << 3) | 19 | #define CLOCK_GATING_BIT_SATA 3 |
20 | #define CLOCK_GATING_PCIE0_MASK (1 << 4) | 20 | #define CLOCK_GATING_BIT_PCIE0 4 |
21 | #define CLOCK_GATING_PCIE1_MASK (1 << 5) | 21 | #define CLOCK_GATING_BIT_PCIE1 5 |
22 | #define CLOCK_GATING_SDIO0_MASK (1 << 8) | 22 | #define CLOCK_GATING_BIT_SDIO0 8 |
23 | #define CLOCK_GATING_SDIO1_MASK (1 << 9) | 23 | #define CLOCK_GATING_BIT_SDIO1 9 |
24 | #define CLOCK_GATING_NAND_MASK (1 << 10) | 24 | #define CLOCK_GATING_BIT_NAND 10 |
25 | #define CLOCK_GATING_CAMERA_MASK (1 << 11) | 25 | #define CLOCK_GATING_BIT_CAMERA 11 |
26 | #define CLOCK_GATING_I2S0_MASK (1 << 12) | 26 | #define CLOCK_GATING_BIT_I2S0 12 |
27 | #define CLOCK_GATING_I2S1_MASK (1 << 13) | 27 | #define CLOCK_GATING_BIT_I2S1 13 |
28 | #define CLOCK_GATING_CRYPTO_MASK (1 << 15) | 28 | #define CLOCK_GATING_BIT_CRYPTO 15 |
29 | #define CLOCK_GATING_AC97_MASK (1 << 21) | 29 | #define CLOCK_GATING_BIT_AC97 21 |
30 | #define CLOCK_GATING_PDMA_MASK (1 << 22) | 30 | #define CLOCK_GATING_BIT_PDMA 22 |
31 | #define CLOCK_GATING_XOR0_MASK (1 << 23) | 31 | #define CLOCK_GATING_BIT_XOR0 23 |
32 | #define CLOCK_GATING_XOR1_MASK (1 << 24) | 32 | #define CLOCK_GATING_BIT_XOR1 24 |
33 | #define CLOCK_GATING_GIGA_PHY_MASK (1 << 30) | 33 | #define CLOCK_GATING_BIT_GIGA_PHY 30 |
34 | #define CLOCK_GATING_USB0_MASK (1 << CLOCK_GATING_BIT_USB0) | ||
35 | #define CLOCK_GATING_USB1_MASK (1 << CLOCK_GATING_BIT_USB1) | ||
36 | #define CLOCK_GATING_GBE_MASK (1 << CLOCK_GATING_BIT_GBE) | ||
37 | #define CLOCK_GATING_SATA_MASK (1 << CLOCK_GATING_BIT_SATA) | ||
38 | #define CLOCK_GATING_PCIE0_MASK (1 << CLOCK_GATING_BIT_PCIE0) | ||
39 | #define CLOCK_GATING_PCIE1_MASK (1 << CLOCK_GATING_BIT_PCIE1) | ||
40 | #define CLOCK_GATING_SDIO0_MASK (1 << CLOCK_GATING_BIT_SDIO0) | ||
41 | #define CLOCK_GATING_SDIO1_MASK (1 << CLOCK_GATING_BIT_SDIO1) | ||
42 | #define CLOCK_GATING_NAND_MASK (1 << CLOCK_GATING_BIT_NAND) | ||
43 | #define CLOCK_GATING_CAMERA_MASK (1 << CLOCK_GATING_BIT_CAMERA) | ||
44 | #define CLOCK_GATING_I2S0_MASK (1 << CLOCK_GATING_BIT_I2S0) | ||
45 | #define CLOCK_GATING_I2S1_MASK (1 << CLOCK_GATING_BIT_I2S1) | ||
46 | #define CLOCK_GATING_CRYPTO_MASK (1 << CLOCK_GATING_BIT_CRYPTO) | ||
47 | #define CLOCK_GATING_AC97_MASK (1 << CLOCK_GATING_BIT_AC97) | ||
48 | #define CLOCK_GATING_PDMA_MASK (1 << CLOCK_GATING_BIT_PDMA) | ||
49 | #define CLOCK_GATING_XOR0_MASK (1 << CLOCK_GATING_BIT_XOR0) | ||
50 | #define CLOCK_GATING_XOR1_MASK (1 << CLOCK_GATING_BIT_XOR1) | ||
51 | #define CLOCK_GATING_GIGA_PHY_MASK (1 << CLOCK_GATING_BIT_GIGA_PHY) | ||
34 | 52 | ||
35 | #define PMU_INTERRUPT_CAUSE (DOVE_PMU_VIRT_BASE + 0x50) | 53 | #define PMU_INTERRUPT_CAUSE (DOVE_PMU_VIRT_BASE + 0x50) |
36 | #define PMU_INTERRUPT_MASK (DOVE_PMU_VIRT_BASE + 0x54) | 54 | #define PMU_INTERRUPT_MASK (DOVE_PMU_VIRT_BASE + 0x54) |