diff options
author | Cyril Chemparathy <cyril@ti.com> | 2010-03-25 17:43:47 -0400 |
---|---|---|
committer | Kevin Hilman <khilman@deeprootsystems.com> | 2010-05-06 18:02:04 -0400 |
commit | 52958be3ad6e2b72a5943718f339ed4e11685739 (patch) | |
tree | dcb17c4491930a31f98701e2e2879877780908d3 /arch/arm/mach-davinci | |
parent | 449ef7f6a9c732657938b222f8804d3e34a3603e (diff) |
Davinci: support LPSC SwRstDisable state
The current clock control code always gates the clock (PSC state Disable = 2)
on clk_disable(). Some on-chip peripherals (e.g. LCD controller on TNETV107X)
need to be put into SwRstDisable = 0 on clock disable, to maintain
hardware sanity.
This patch extends the davinci_psc_config() arguments to pass in the desired
module state instead of a boolean enable/disable. Further, clk_disable() now
checks for the PSC_SWRSTDISABLE clk flag before selecting the target state.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci')
-rw-r--r-- | arch/arm/mach-davinci/clock.c | 12 | ||||
-rw-r--r-- | arch/arm/mach-davinci/clock.h | 7 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/psc.h | 8 | ||||
-rw-r--r-- | arch/arm/mach-davinci/psc.c | 3 |
4 files changed, 21 insertions, 9 deletions
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index 058c77f72a07..5de60ae57903 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c | |||
@@ -43,7 +43,8 @@ static void __clk_enable(struct clk *clk) | |||
43 | if (clk->parent) | 43 | if (clk->parent) |
44 | __clk_enable(clk->parent); | 44 | __clk_enable(clk->parent); |
45 | if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) | 45 | if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) |
46 | davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, 1); | 46 | davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, |
47 | PSC_STATE_ENABLE); | ||
47 | } | 48 | } |
48 | 49 | ||
49 | static void __clk_disable(struct clk *clk) | 50 | static void __clk_disable(struct clk *clk) |
@@ -52,7 +53,9 @@ static void __clk_disable(struct clk *clk) | |||
52 | return; | 53 | return; |
53 | if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) && | 54 | if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) && |
54 | (clk->flags & CLK_PSC)) | 55 | (clk->flags & CLK_PSC)) |
55 | davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, 0); | 56 | davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, |
57 | (clk->flags & PSC_SWRSTDISABLE) ? | ||
58 | PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE); | ||
56 | if (clk->parent) | 59 | if (clk->parent) |
57 | __clk_disable(clk->parent); | 60 | __clk_disable(clk->parent); |
58 | } | 61 | } |
@@ -234,7 +237,10 @@ static int __init clk_disable_unused(void) | |||
234 | continue; | 237 | continue; |
235 | 238 | ||
236 | pr_info("Clocks: disable unused %s\n", ck->name); | 239 | pr_info("Clocks: disable unused %s\n", ck->name); |
237 | davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc, 0); | 240 | |
241 | davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc, | ||
242 | (ck->flags & PSC_SWRSTDISABLE) ? | ||
243 | PSC_STATE_SWRSTDISABLE : PSC_STATE_DISABLE); | ||
238 | } | 244 | } |
239 | spin_unlock_irq(&clockfw_lock); | 245 | spin_unlock_irq(&clockfw_lock); |
240 | 246 | ||
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index aa0a61150325..53a0f7b90119 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h | |||
@@ -101,10 +101,11 @@ struct clk { | |||
101 | 101 | ||
102 | /* Clock flags: SoC-specific flags start at BIT(16) */ | 102 | /* Clock flags: SoC-specific flags start at BIT(16) */ |
103 | #define ALWAYS_ENABLED BIT(1) | 103 | #define ALWAYS_ENABLED BIT(1) |
104 | #define CLK_PSC BIT(2) | 104 | #define CLK_PSC BIT(2) |
105 | #define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */ | 105 | #define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */ |
106 | #define CLK_PLL BIT(4) /* PLL-derived clock */ | 106 | #define CLK_PLL BIT(4) /* PLL-derived clock */ |
107 | #define PRE_PLL BIT(5) /* source is before PLL mult/div */ | 107 | #define PRE_PLL BIT(5) /* source is before PLL mult/div */ |
108 | #define PSC_SWRSTDISABLE BIT(6) /* Disable state is SwRstDisable */ | ||
108 | 109 | ||
109 | #define CLK(dev, con, ck) \ | 110 | #define CLK(dev, con, ck) \ |
110 | { \ | 111 | { \ |
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h index 651f6d8158fa..7dd2962ad586 100644 --- a/arch/arm/mach-davinci/include/mach/psc.h +++ b/arch/arm/mach-davinci/include/mach/psc.h | |||
@@ -189,13 +189,19 @@ | |||
189 | #define MDSTAT 0x800 | 189 | #define MDSTAT 0x800 |
190 | #define MDCTL 0xA00 | 190 | #define MDCTL 0xA00 |
191 | 191 | ||
192 | /* PSC module states */ | ||
193 | #define PSC_STATE_SWRSTDISABLE 0 | ||
194 | #define PSC_STATE_SYNCRST 1 | ||
195 | #define PSC_STATE_DISABLE 2 | ||
196 | #define PSC_STATE_ENABLE 3 | ||
197 | |||
192 | #define MDSTAT_STATE_MASK 0x1f | 198 | #define MDSTAT_STATE_MASK 0x1f |
193 | 199 | ||
194 | #ifndef __ASSEMBLER__ | 200 | #ifndef __ASSEMBLER__ |
195 | 201 | ||
196 | extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); | 202 | extern int davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id); |
197 | extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, | 203 | extern void davinci_psc_config(unsigned int domain, unsigned int ctlr, |
198 | unsigned int id, char enable); | 204 | unsigned int id, u32 next_state); |
199 | 205 | ||
200 | #endif | 206 | #endif |
201 | 207 | ||
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c index adf6b5c7f1e5..d7cb438c4df6 100644 --- a/arch/arm/mach-davinci/psc.c +++ b/arch/arm/mach-davinci/psc.c | |||
@@ -47,12 +47,11 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id) | |||
47 | 47 | ||
48 | /* Enable or disable a PSC domain */ | 48 | /* Enable or disable a PSC domain */ |
49 | void davinci_psc_config(unsigned int domain, unsigned int ctlr, | 49 | void davinci_psc_config(unsigned int domain, unsigned int ctlr, |
50 | unsigned int id, char enable) | 50 | unsigned int id, u32 next_state) |
51 | { | 51 | { |
52 | u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; | 52 | u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; |
53 | void __iomem *psc_base; | 53 | void __iomem *psc_base; |
54 | struct davinci_soc_info *soc_info = &davinci_soc_info; | 54 | struct davinci_soc_info *soc_info = &davinci_soc_info; |
55 | u32 next_state = enable ? 0x3 : 0x2; /* 0x3 enables, 0x2 disables */ | ||
56 | 55 | ||
57 | if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { | 56 | if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) { |
58 | pr_warning("PSC: Bad psc data: 0x%x[%d]\n", | 57 | pr_warning("PSC: Bad psc data: 0x%x[%d]\n", |