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authorBrian Niebuhr <bniebuhr@efjohnson.com>2010-10-06 09:02:40 -0400
committerSekhar Nori <nsekhar@ti.com>2010-11-18 08:08:37 -0500
commit035540f6ea2394bdd9675552d31e1125cd0e402e (patch)
tree2e8673d2920cd473aef270e05f4520456d5c3090 /arch/arm/mach-davinci
parentd8c174cdeb6511aa307e6058468b68a9cc3990e4 (diff)
spi: davinci: add additional comments
Add comments describing the platform data members and per-chip-select SPI configuration structure. Also, add some comments describing the what happens during the driver probe. Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com> Tested-By: Michael Williamson <michael.williamson@criticallink.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'arch/arm/mach-davinci')
-rw-r--r--arch/arm/mach-davinci/include/mach/spi.h32
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index 1f8b7866bea3..38f4da5ca135 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -26,6 +26,20 @@ enum {
26 SPI_VERSION_2, /* For DA8xx */ 26 SPI_VERSION_2, /* For DA8xx */
27}; 27};
28 28
29/**
30 * davinci_spi_platform_data - Platform data for SPI master device on DaVinci
31 *
32 * @version: version of the SPI IP. Different DaVinci devices have slightly
33 * varying versions of the same IP.
34 * @num_chipselect: number of chipselects supported by this SPI master
35 * @intr_line: interrupt line used to connect the SPI IP to the ARM interrupt
36 * controller withn the SoC. Possible values are 0 and 1.
37 * @chip_sel: list of GPIOs which can act as chip-selects for the SPI.
38 * SPI_INTERN_CS denotes internal SPI chip-select. Not necessary
39 * to populate if all chip-selects are internal.
40 * @cshold_bug: set this to true if the SPI controller on your chip requires
41 * a write to CSHOLD bit in between transfers (like in DM355).
42 */
29struct davinci_spi_platform_data { 43struct davinci_spi_platform_data {
30 u8 version; 44 u8 version;
31 u8 num_chipselect; 45 u8 num_chipselect;
@@ -34,6 +48,24 @@ struct davinci_spi_platform_data {
34 bool cshold_bug; 48 bool cshold_bug;
35}; 49};
36 50
51/**
52 * davinci_spi_config - Per-chip-select configuration for SPI slave devices
53 *
54 * @wdelay: amount of delay between transmissions. Measured in number of
55 * SPI module clocks.
56 * @odd_parity: polarity of parity flag at the end of transmit data stream.
57 * 0 - odd parity, 1 - even parity.
58 * @parity_enable: enable transmission of parity at end of each transmit
59 * data stream.
60 * @io_type: type of IO transfer. Choose between polled, interrupt and DMA.
61 * @timer_disable: disable chip-select timers (setup and hold)
62 * @c2tdelay: chip-select setup time. Measured in number of SPI module clocks.
63 * @t2cdelay: chip-select hold time. Measured in number of SPI module clocks.
64 * @t2edelay: transmit data finished to SPI ENAn pin inactive time. Measured
65 * in number of SPI clocks.
66 * @c2edelay: chip-select active to SPI ENAn signal active time. Measured in
67 * number of SPI clocks.
68 */
37struct davinci_spi_config { 69struct davinci_spi_config {
38 u8 wdelay; 70 u8 wdelay;
39 u8 odd_parity; 71 u8 odd_parity;