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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2011-04-06 13:26:06 -0400
committerSekhar Nori <nsekhar@ti.com>2011-05-06 02:40:54 -0400
commite0c199d0989e2f9fa2683e817624779f55abfa7f (patch)
treee5b850f14b9811d6ca5276d443328a063915b32a /arch/arm/mach-davinci
parent5a9f68fd2608384e09e18767ebc253d7aee86b34 (diff)
DA8xx: kill duplicate #define DA8XX_PLL1_BASE
Commit 044ca01521d077a35b46a445b02b93f413109a4b (davinci: da850/omap-l138: add support for SoC suspend) introduced DA8XX_PLL1_BASE despite PLL1 exists only on DA850/OMAP-L138 and da850.c even already #define'd DA850_PLL1_BASE. Kill the duplicate macro, renaming an existing reference to it... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Diffstat (limited to 'arch/arm/mach-davinci')
-rw-r--r--arch/arm/mach-davinci/da850.c2
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h1
2 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index b95b9196deed..133aac405853 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -1055,7 +1055,7 @@ int da850_register_pm(struct platform_device *pdev)
1055 if (!pdata->cpupll_reg_base) 1055 if (!pdata->cpupll_reg_base)
1056 return -ENOMEM; 1056 return -ENOMEM;
1057 1057
1058 pdata->ddrpll_reg_base = ioremap(DA8XX_PLL1_BASE, SZ_4K); 1058 pdata->ddrpll_reg_base = ioremap(DA850_PLL1_BASE, SZ_4K);
1059 if (!pdata->ddrpll_reg_base) { 1059 if (!pdata->ddrpll_reg_base) {
1060 ret = -ENOMEM; 1060 ret = -ENOMEM;
1061 goto no_ddrpll_mem; 1061 goto no_ddrpll_mem;
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index e4fc1af8500e..2897014a7e58 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -65,7 +65,6 @@ extern unsigned int da850_max_speed;
65#define DA8XX_GPIO_BASE 0x01e26000 65#define DA8XX_GPIO_BASE 0x01e26000
66#define DA8XX_PSC1_BASE 0x01e27000 66#define DA8XX_PSC1_BASE 0x01e27000
67#define DA8XX_LCD_CNTRL_BASE 0x01e13000 67#define DA8XX_LCD_CNTRL_BASE 0x01e13000
68#define DA8XX_PLL1_BASE 0x01e1a000
69#define DA8XX_MMCSD0_BASE 0x01c40000 68#define DA8XX_MMCSD0_BASE 0x01c40000
70#define DA8XX_AEMIF_CS2_BASE 0x60000000 69#define DA8XX_AEMIF_CS2_BASE 0x60000000
71#define DA8XX_AEMIF_CS3_BASE 0x62000000 70#define DA8XX_AEMIF_CS3_BASE 0x62000000