diff options
author | Olof Johansson <olof@lixom.net> | 2011-12-16 00:59:39 -0500 |
---|---|---|
committer | Olof Johansson <olof@lixom.net> | 2011-12-16 00:59:39 -0500 |
commit | f68453e076dcf140c4a7bdd385f239b1e41be983 (patch) | |
tree | 47312e2c7e95aa96fb0612b6e26f6b2901e88fa6 /arch/arm/mach-davinci | |
parent | 2da994e687f7991cc76e3270c423bf6500b9424a (diff) | |
parent | 99b2034c68523380599a451f5e753c6ea345fc79 (diff) |
Merge branch 'davinci/features' into next/devel
* davinci/features:
ARM: davinci: add support for multiple power domains
Diffstat (limited to 'arch/arm/mach-davinci')
-rw-r--r-- | arch/arm/mach-davinci/clock.c | 13 | ||||
-rw-r--r-- | arch/arm/mach-davinci/clock.h | 10 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm644x.c | 4 |
3 files changed, 10 insertions, 17 deletions
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c index 00861139101d..008772e3b843 100644 --- a/arch/arm/mach-davinci/clock.c +++ b/arch/arm/mach-davinci/clock.c | |||
@@ -31,19 +31,12 @@ static LIST_HEAD(clocks); | |||
31 | static DEFINE_MUTEX(clocks_mutex); | 31 | static DEFINE_MUTEX(clocks_mutex); |
32 | static DEFINE_SPINLOCK(clockfw_lock); | 32 | static DEFINE_SPINLOCK(clockfw_lock); |
33 | 33 | ||
34 | static unsigned psc_domain(struct clk *clk) | ||
35 | { | ||
36 | return (clk->flags & PSC_DSP) | ||
37 | ? DAVINCI_GPSC_DSPDOMAIN | ||
38 | : DAVINCI_GPSC_ARMDOMAIN; | ||
39 | } | ||
40 | |||
41 | static void __clk_enable(struct clk *clk) | 34 | static void __clk_enable(struct clk *clk) |
42 | { | 35 | { |
43 | if (clk->parent) | 36 | if (clk->parent) |
44 | __clk_enable(clk->parent); | 37 | __clk_enable(clk->parent); |
45 | if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) | 38 | if (clk->usecount++ == 0 && (clk->flags & CLK_PSC)) |
46 | davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, | 39 | davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc, |
47 | true, clk->flags); | 40 | true, clk->flags); |
48 | } | 41 | } |
49 | 42 | ||
@@ -53,7 +46,7 @@ static void __clk_disable(struct clk *clk) | |||
53 | return; | 46 | return; |
54 | if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) && | 47 | if (--clk->usecount == 0 && !(clk->flags & CLK_PLL) && |
55 | (clk->flags & CLK_PSC)) | 48 | (clk->flags & CLK_PSC)) |
56 | davinci_psc_config(psc_domain(clk), clk->gpsc, clk->lpsc, | 49 | davinci_psc_config(clk->domain, clk->gpsc, clk->lpsc, |
57 | false, clk->flags); | 50 | false, clk->flags); |
58 | if (clk->parent) | 51 | if (clk->parent) |
59 | __clk_disable(clk->parent); | 52 | __clk_disable(clk->parent); |
@@ -237,7 +230,7 @@ static int __init clk_disable_unused(void) | |||
237 | 230 | ||
238 | pr_debug("Clocks: disable unused %s\n", ck->name); | 231 | pr_debug("Clocks: disable unused %s\n", ck->name); |
239 | 232 | ||
240 | davinci_psc_config(psc_domain(ck), ck->gpsc, ck->lpsc, | 233 | davinci_psc_config(ck->domain, ck->gpsc, ck->lpsc, |
241 | false, ck->flags); | 234 | false, ck->flags); |
242 | } | 235 | } |
243 | spin_unlock_irq(&clockfw_lock); | 236 | spin_unlock_irq(&clockfw_lock); |
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h index a705f367a84d..46f0f1bf1a4c 100644 --- a/arch/arm/mach-davinci/clock.h +++ b/arch/arm/mach-davinci/clock.h | |||
@@ -93,6 +93,7 @@ struct clk { | |||
93 | u8 usecount; | 93 | u8 usecount; |
94 | u8 lpsc; | 94 | u8 lpsc; |
95 | u8 gpsc; | 95 | u8 gpsc; |
96 | u8 domain; | ||
96 | u32 flags; | 97 | u32 flags; |
97 | struct clk *parent; | 98 | struct clk *parent; |
98 | struct list_head children; /* list of children */ | 99 | struct list_head children; /* list of children */ |
@@ -107,11 +108,10 @@ struct clk { | |||
107 | /* Clock flags: SoC-specific flags start at BIT(16) */ | 108 | /* Clock flags: SoC-specific flags start at BIT(16) */ |
108 | #define ALWAYS_ENABLED BIT(1) | 109 | #define ALWAYS_ENABLED BIT(1) |
109 | #define CLK_PSC BIT(2) | 110 | #define CLK_PSC BIT(2) |
110 | #define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */ | 111 | #define CLK_PLL BIT(3) /* PLL-derived clock */ |
111 | #define CLK_PLL BIT(4) /* PLL-derived clock */ | 112 | #define PRE_PLL BIT(4) /* source is before PLL mult/div */ |
112 | #define PRE_PLL BIT(5) /* source is before PLL mult/div */ | 113 | #define PSC_SWRSTDISABLE BIT(5) /* Disable state is SwRstDisable */ |
113 | #define PSC_SWRSTDISABLE BIT(6) /* Disable state is SwRstDisable */ | 114 | #define PSC_FORCE BIT(6) /* Force module state transtition */ |
114 | #define PSC_FORCE BIT(7) /* Force module state transtition */ | ||
115 | 115 | ||
116 | #define CLK(dev, con, ck) \ | 116 | #define CLK(dev, con, ck) \ |
117 | { \ | 117 | { \ |
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 3470983aa343..b95097dbdfed 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c | |||
@@ -130,7 +130,7 @@ static struct clk dsp_clk = { | |||
130 | .name = "dsp", | 130 | .name = "dsp", |
131 | .parent = &pll1_sysclk1, | 131 | .parent = &pll1_sysclk1, |
132 | .lpsc = DAVINCI_LPSC_GEM, | 132 | .lpsc = DAVINCI_LPSC_GEM, |
133 | .flags = PSC_DSP, | 133 | .domain = DAVINCI_GPSC_DSPDOMAIN, |
134 | .usecount = 1, /* REVISIT how to disable? */ | 134 | .usecount = 1, /* REVISIT how to disable? */ |
135 | }; | 135 | }; |
136 | 136 | ||
@@ -145,7 +145,7 @@ static struct clk vicp_clk = { | |||
145 | .name = "vicp", | 145 | .name = "vicp", |
146 | .parent = &pll1_sysclk2, | 146 | .parent = &pll1_sysclk2, |
147 | .lpsc = DAVINCI_LPSC_IMCOP, | 147 | .lpsc = DAVINCI_LPSC_IMCOP, |
148 | .flags = PSC_DSP, | 148 | .domain = DAVINCI_GPSC_DSPDOMAIN, |
149 | .usecount = 1, /* REVISIT how to disable? */ | 149 | .usecount = 1, /* REVISIT how to disable? */ |
150 | }; | 150 | }; |
151 | 151 | ||