diff options
author | Ido Yariv <ido@wizery.com> | 2011-07-10 09:14:35 -0400 |
---|---|---|
committer | Sekhar Nori <nsekhar@ti.com> | 2011-09-17 06:24:08 -0400 |
commit | f23fe857bbea393b4b94fe2218c98d934bd3d4cf (patch) | |
tree | 39661f5a8db2b71a3efcd4dd19c5133462de87f4 /arch/arm/mach-davinci | |
parent | b6fd41e29dea9c6753b1843a77e50433e6123bcb (diff) |
ARM: davinci: Explicitly set channel controllers' default queues
Davinci platforms may define a default queue for each channel
controller. If one is not defined, the default queue is set to EVENTQ_1.
However, there's no way to distinguish between an unset default queue to
one that is set to EVENTQ_0, as EVENTQ_0 = 0.
Explicitly specify the default queue for all channel controllers on all
Davinci platforms to EVENTQ_1, and don't overwrite it in the EDMA probe
function.
One exception is the DA850 board, for which EVENTQ_1 is not a valid
option for its second channel controller. Use EVENTQ_0 instead for that
channel controller.
Signed-off-by: Ido Yariv <ido@wizery.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'arch/arm/mach-davinci')
-rw-r--r-- | arch/arm/mach-davinci/devices-da8xx.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-davinci/devices-tnetv107x.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm355.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm644x.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dm646x.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-davinci/dma.c | 2 |
6 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 2f7e719636f1..68def7188868 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
@@ -136,6 +136,7 @@ static struct edma_soc_info da830_edma_cc0_info = { | |||
136 | .n_cc = 1, | 136 | .n_cc = 1, |
137 | .queue_tc_mapping = da8xx_queue_tc_mapping, | 137 | .queue_tc_mapping = da8xx_queue_tc_mapping, |
138 | .queue_priority_mapping = da8xx_queue_priority_mapping, | 138 | .queue_priority_mapping = da8xx_queue_priority_mapping, |
139 | .default_queue = EVENTQ_1, | ||
139 | }; | 140 | }; |
140 | 141 | ||
141 | static struct edma_soc_info *da830_edma_info[EDMA_MAX_CC] = { | 142 | static struct edma_soc_info *da830_edma_info[EDMA_MAX_CC] = { |
@@ -151,6 +152,7 @@ static struct edma_soc_info da850_edma_cc_info[] = { | |||
151 | .n_cc = 1, | 152 | .n_cc = 1, |
152 | .queue_tc_mapping = da8xx_queue_tc_mapping, | 153 | .queue_tc_mapping = da8xx_queue_tc_mapping, |
153 | .queue_priority_mapping = da8xx_queue_priority_mapping, | 154 | .queue_priority_mapping = da8xx_queue_priority_mapping, |
155 | .default_queue = EVENTQ_1, | ||
154 | }, | 156 | }, |
155 | { | 157 | { |
156 | .n_channel = 32, | 158 | .n_channel = 32, |
@@ -160,6 +162,7 @@ static struct edma_soc_info da850_edma_cc_info[] = { | |||
160 | .n_cc = 1, | 162 | .n_cc = 1, |
161 | .queue_tc_mapping = da850_queue_tc_mapping, | 163 | .queue_tc_mapping = da850_queue_tc_mapping, |
162 | .queue_priority_mapping = da850_queue_priority_mapping, | 164 | .queue_priority_mapping = da850_queue_priority_mapping, |
165 | .default_queue = EVENTQ_0, | ||
163 | }, | 166 | }, |
164 | }; | 167 | }; |
165 | 168 | ||
diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c index 6162cae7f868..29b17f7d3a5f 100644 --- a/arch/arm/mach-davinci/devices-tnetv107x.c +++ b/arch/arm/mach-davinci/devices-tnetv107x.c | |||
@@ -80,6 +80,7 @@ static struct edma_soc_info edma_cc0_info = { | |||
80 | .n_cc = 1, | 80 | .n_cc = 1, |
81 | .queue_tc_mapping = edma_tc_mapping, | 81 | .queue_tc_mapping = edma_tc_mapping, |
82 | .queue_priority_mapping = edma_priority_mapping, | 82 | .queue_priority_mapping = edma_priority_mapping, |
83 | .default_queue = EVENTQ_1, | ||
83 | }; | 84 | }; |
84 | 85 | ||
85 | static struct edma_soc_info *tnetv107x_edma_info[EDMA_MAX_CC] = { | 86 | static struct edma_soc_info *tnetv107x_edma_info[EDMA_MAX_CC] = { |
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c index a3a94e9c9378..68fb18162459 100644 --- a/arch/arm/mach-davinci/dm355.c +++ b/arch/arm/mach-davinci/dm355.c | |||
@@ -591,6 +591,7 @@ static struct edma_soc_info edma_cc0_info = { | |||
591 | .n_cc = 1, | 591 | .n_cc = 1, |
592 | .queue_tc_mapping = queue_tc_mapping, | 592 | .queue_tc_mapping = queue_tc_mapping, |
593 | .queue_priority_mapping = queue_priority_mapping, | 593 | .queue_priority_mapping = queue_priority_mapping, |
594 | .default_queue = EVENTQ_1, | ||
594 | }; | 595 | }; |
595 | 596 | ||
596 | static struct edma_soc_info *dm355_edma_info[EDMA_MAX_CC] = { | 597 | static struct edma_soc_info *dm355_edma_info[EDMA_MAX_CC] = { |
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c index 4c82c2716293..555ff5bdb220 100644 --- a/arch/arm/mach-davinci/dm644x.c +++ b/arch/arm/mach-davinci/dm644x.c | |||
@@ -514,6 +514,7 @@ static struct edma_soc_info edma_cc0_info = { | |||
514 | .n_cc = 1, | 514 | .n_cc = 1, |
515 | .queue_tc_mapping = queue_tc_mapping, | 515 | .queue_tc_mapping = queue_tc_mapping, |
516 | .queue_priority_mapping = queue_priority_mapping, | 516 | .queue_priority_mapping = queue_priority_mapping, |
517 | .default_queue = EVENTQ_1, | ||
517 | }; | 518 | }; |
518 | 519 | ||
519 | static struct edma_soc_info *dm644x_edma_info[EDMA_MAX_CC] = { | 520 | static struct edma_soc_info *dm644x_edma_info[EDMA_MAX_CC] = { |
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 1802e711a2b8..b0c350a02484 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c | |||
@@ -555,6 +555,7 @@ static struct edma_soc_info edma_cc0_info = { | |||
555 | .n_cc = 1, | 555 | .n_cc = 1, |
556 | .queue_tc_mapping = dm646x_queue_tc_mapping, | 556 | .queue_tc_mapping = dm646x_queue_tc_mapping, |
557 | .queue_priority_mapping = dm646x_queue_priority_mapping, | 557 | .queue_priority_mapping = dm646x_queue_priority_mapping, |
558 | .default_queue = EVENTQ_1, | ||
558 | }; | 559 | }; |
559 | 560 | ||
560 | static struct edma_soc_info *dm646x_edma_info[EDMA_MAX_CC] = { | 561 | static struct edma_soc_info *dm646x_edma_info[EDMA_MAX_CC] = { |
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c index 6b9669869c46..6ba4191d6570 100644 --- a/arch/arm/mach-davinci/dma.c +++ b/arch/arm/mach-davinci/dma.c | |||
@@ -1450,8 +1450,6 @@ static int __init edma_probe(struct platform_device *pdev) | |||
1450 | EDMA_MAX_CC); | 1450 | EDMA_MAX_CC); |
1451 | 1451 | ||
1452 | edma_cc[j]->default_queue = info[j]->default_queue; | 1452 | edma_cc[j]->default_queue = info[j]->default_queue; |
1453 | if (!edma_cc[j]->default_queue) | ||
1454 | edma_cc[j]->default_queue = EVENTQ_1; | ||
1455 | 1453 | ||
1456 | dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n", | 1454 | dev_dbg(&pdev->dev, "DMA REG BASE ADDR=%p\n", |
1457 | edmacc_regs_base[j]); | 1455 | edmacc_regs_base[j]); |