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authorOlof Johansson <olof@lixom.net>2011-12-13 22:35:03 -0500
committerOlof Johansson <olof@lixom.net>2011-12-13 22:35:03 -0500
commit2da994e687f7991cc76e3270c423bf6500b9424a (patch)
tree437d685035c2a39395f14c233831422ed636c016 /arch/arm/mach-davinci
parent00e929808a1cb410f45a620c0fc79d8d0a2506b1 (diff)
parentdb33f4de9952af112b0d4f2436ce931ae632aba0 (diff)
Merge branch 'orion/devel' into next/devel
Diffstat (limited to 'arch/arm/mach-davinci')
-rw-r--r--arch/arm/mach-davinci/board-da850-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm365-evm.c2
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c6
-rw-r--r--arch/arm/mach-davinci/dm646x.c1
-rw-r--r--arch/arm/mach-davinci/include/mach/psc.h5
-rw-r--r--arch/arm/mach-davinci/psc.c18
6 files changed, 18 insertions, 16 deletions
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index 1d7d24995226..6659a90dbcad 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -753,7 +753,7 @@ static struct snd_platform_data da850_evm_snd_data = {
753 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction), 753 .num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
754 .tdm_slots = 2, 754 .tdm_slots = 2,
755 .serial_dir = da850_iis_serializer_direction, 755 .serial_dir = da850_iis_serializer_direction,
756 .asp_chan_q = EVENTQ_1, 756 .asp_chan_q = EVENTQ_0,
757 .version = MCASP_VERSION_2, 757 .version = MCASP_VERSION_2,
758 .txnumevt = 1, 758 .txnumevt = 1,
759 .rxnumevt = 1, 759 .rxnumevt = 1,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 1918ae711428..46e1f4173b97 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -107,7 +107,7 @@ static struct mtd_partition davinci_nand_partitions[] = {
107 /* UBL (a few copies) plus U-Boot */ 107 /* UBL (a few copies) plus U-Boot */
108 .name = "bootloader", 108 .name = "bootloader",
109 .offset = 0, 109 .offset = 0,
110 .size = 28 * NAND_BLOCK_SIZE, 110 .size = 30 * NAND_BLOCK_SIZE,
111 .mask_flags = MTD_WRITEABLE, /* force read-only */ 111 .mask_flags = MTD_WRITEABLE, /* force read-only */
112 }, { 112 }, {
113 /* U-Boot environment */ 113 /* U-Boot environment */
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index e574d7f837a8..635bf7740157 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -564,7 +564,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
564 int val; 564 int val;
565 u32 value; 565 u32 value;
566 566
567 if (!vpif_vsclkdis_reg || !cpld_client) 567 if (!vpif_vidclkctl_reg || !cpld_client)
568 return -ENXIO; 568 return -ENXIO;
569 569
570 val = i2c_smbus_read_byte(cpld_client); 570 val = i2c_smbus_read_byte(cpld_client);
@@ -572,7 +572,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
572 return val; 572 return val;
573 573
574 spin_lock_irqsave(&vpif_reg_lock, flags); 574 spin_lock_irqsave(&vpif_reg_lock, flags);
575 value = __raw_readl(vpif_vsclkdis_reg); 575 value = __raw_readl(vpif_vidclkctl_reg);
576 if (mux_mode) { 576 if (mux_mode) {
577 val &= VPIF_INPUT_TWO_CHANNEL; 577 val &= VPIF_INPUT_TWO_CHANNEL;
578 value |= VIDCH1CLK; 578 value |= VIDCH1CLK;
@@ -580,7 +580,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
580 val |= VPIF_INPUT_ONE_CHANNEL; 580 val |= VPIF_INPUT_ONE_CHANNEL;
581 value &= ~VIDCH1CLK; 581 value &= ~VIDCH1CLK;
582 } 582 }
583 __raw_writel(value, vpif_vsclkdis_reg); 583 __raw_writel(value, vpif_vidclkctl_reg);
584 spin_unlock_irqrestore(&vpif_reg_lock, flags); 584 spin_unlock_irqrestore(&vpif_reg_lock, flags);
585 585
586 err = i2c_smbus_write_byte(cpld_client, val); 586 err = i2c_smbus_write_byte(cpld_client, val);
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 0b68ed534f8e..af27c130595f 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -161,7 +161,6 @@ static struct clk dsp_clk = {
161 .name = "dsp", 161 .name = "dsp",
162 .parent = &pll1_sysclk1, 162 .parent = &pll1_sysclk1,
163 .lpsc = DM646X_LPSC_C64X_CPU, 163 .lpsc = DM646X_LPSC_C64X_CPU,
164 .flags = PSC_DSP,
165 .usecount = 1, /* REVISIT how to disable? */ 164 .usecount = 1, /* REVISIT how to disable? */
166}; 165};
167 166
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index fa59c097223d..8bc3fc256171 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -233,7 +233,7 @@
233#define PTCMD 0x120 233#define PTCMD 0x120
234#define PTSTAT 0x128 234#define PTSTAT 0x128
235#define PDSTAT 0x200 235#define PDSTAT 0x200
236#define PDCTL1 0x304 236#define PDCTL 0x300
237#define MDSTAT 0x800 237#define MDSTAT 0x800
238#define MDCTL 0xA00 238#define MDCTL 0xA00
239 239
@@ -244,7 +244,10 @@
244#define PSC_STATE_ENABLE 3 244#define PSC_STATE_ENABLE 3
245 245
246#define MDSTAT_STATE_MASK 0x3f 246#define MDSTAT_STATE_MASK 0x3f
247#define PDSTAT_STATE_MASK 0x1f
247#define MDCTL_FORCE BIT(31) 248#define MDCTL_FORCE BIT(31)
249#define PDCTL_NEXT BIT(1)
250#define PDCTL_EPCGOOD BIT(8)
248 251
249#ifndef __ASSEMBLER__ 252#ifndef __ASSEMBLER__
250 253
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index 1fb6bdff38c1..d7e210f4b55c 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -52,7 +52,7 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
52void davinci_psc_config(unsigned int domain, unsigned int ctlr, 52void davinci_psc_config(unsigned int domain, unsigned int ctlr,
53 unsigned int id, bool enable, u32 flags) 53 unsigned int id, bool enable, u32 flags)
54{ 54{
55 u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl; 55 u32 epcpr, ptcmd, ptstat, pdstat, pdctl, mdstat, mdctl;
56 void __iomem *psc_base; 56 void __iomem *psc_base;
57 struct davinci_soc_info *soc_info = &davinci_soc_info; 57 struct davinci_soc_info *soc_info = &davinci_soc_info;
58 u32 next_state = PSC_STATE_ENABLE; 58 u32 next_state = PSC_STATE_ENABLE;
@@ -79,11 +79,11 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
79 mdctl |= MDCTL_FORCE; 79 mdctl |= MDCTL_FORCE;
80 __raw_writel(mdctl, psc_base + MDCTL + 4 * id); 80 __raw_writel(mdctl, psc_base + MDCTL + 4 * id);
81 81
82 pdstat = __raw_readl(psc_base + PDSTAT); 82 pdstat = __raw_readl(psc_base + PDSTAT + 4 * domain);
83 if ((pdstat & 0x00000001) == 0) { 83 if ((pdstat & PDSTAT_STATE_MASK) == 0) {
84 pdctl1 = __raw_readl(psc_base + PDCTL1); 84 pdctl = __raw_readl(psc_base + PDCTL + 4 * domain);
85 pdctl1 |= 0x1; 85 pdctl |= PDCTL_NEXT;
86 __raw_writel(pdctl1, psc_base + PDCTL1); 86 __raw_writel(pdctl, psc_base + PDCTL + 4 * domain);
87 87
88 ptcmd = 1 << domain; 88 ptcmd = 1 << domain;
89 __raw_writel(ptcmd, psc_base + PTCMD); 89 __raw_writel(ptcmd, psc_base + PTCMD);
@@ -92,9 +92,9 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
92 epcpr = __raw_readl(psc_base + EPCPR); 92 epcpr = __raw_readl(psc_base + EPCPR);
93 } while ((((epcpr >> domain) & 1) == 0)); 93 } while ((((epcpr >> domain) & 1) == 0));
94 94
95 pdctl1 = __raw_readl(psc_base + PDCTL1); 95 pdctl = __raw_readl(psc_base + PDCTL + 4 * domain);
96 pdctl1 |= 0x100; 96 pdctl |= PDCTL_EPCGOOD;
97 __raw_writel(pdctl1, psc_base + PDCTL1); 97 __raw_writel(pdctl, psc_base + PDCTL + 4 * domain);
98 } else { 98 } else {
99 ptcmd = 1 << domain; 99 ptcmd = 1 << domain;
100 __raw_writel(ptcmd, psc_base + PTCMD); 100 __raw_writel(ptcmd, psc_base + PTCMD);