diff options
author | Sergei Shtylyov <sshtylyov@ru.mvista.com> | 2009-09-25 14:24:57 -0400 |
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committer | Kevin Hilman <khilman@deeprootsystems.com> | 2009-11-25 13:21:26 -0500 |
commit | 371b53e02546dd49249e8a4ffdafcc649b348357 (patch) | |
tree | 714c72e70041fed237c10ca1a714129b837f6c83 /arch/arm/mach-davinci/include | |
parent | 134ce221b03404148ec53c829d96bdd25170b55b (diff) |
davinci: DA8xx: CFGCHIP2 register definitions
These are needed by the MUSB and OHCI glue layers...
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/include')
-rw-r--r-- | arch/arm/mach-davinci/include/mach/da8xx.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/usb.h | 37 |
2 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index a152261c1951..abb8a5b2c692 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h | |||
@@ -36,6 +36,7 @@ extern void __iomem *da8xx_syscfg_base; | |||
36 | #define DA8XX_SYSCFG_BASE (IO_PHYS + 0x14000) | 36 | #define DA8XX_SYSCFG_BASE (IO_PHYS + 0x14000) |
37 | #define DA8XX_SYSCFG_VIRT(x) (da8xx_syscfg_base + (x)) | 37 | #define DA8XX_SYSCFG_VIRT(x) (da8xx_syscfg_base + (x)) |
38 | #define DA8XX_JTAG_ID_REG 0x18 | 38 | #define DA8XX_JTAG_ID_REG 0x18 |
39 | #define DA8XX_CFGCHIP2_REG 0x184 | ||
39 | #define DA8XX_CFGCHIP3_REG 0x188 | 40 | #define DA8XX_CFGCHIP3_REG 0x188 |
40 | 41 | ||
41 | #define DA8XX_PSC0_BASE 0x01c10000 | 42 | #define DA8XX_PSC0_BASE 0x01c10000 |
diff --git a/arch/arm/mach-davinci/include/mach/usb.h b/arch/arm/mach-davinci/include/mach/usb.h new file mode 100644 index 000000000000..d0fb412a9edd --- /dev/null +++ b/arch/arm/mach-davinci/include/mach/usb.h | |||
@@ -0,0 +1,37 @@ | |||
1 | /* | ||
2 | * USB related definitions | ||
3 | * | ||
4 | * Copyright (C) 2009 MontaVista Software, Inc. <source@mvista.com> | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public License | ||
7 | * version 2. This program is licensed "as is" without any warranty of any | ||
8 | * kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_USB_H | ||
12 | #define __ASM_ARCH_USB_H | ||
13 | |||
14 | /* DA8xx CFGCHIP2 (USB 2.0 PHY Control) register bits */ | ||
15 | #define CFGCHIP2_PHYCLKGD (1 << 17) | ||
16 | #define CFGCHIP2_VBUSSENSE (1 << 16) | ||
17 | #define CFGCHIP2_RESET (1 << 15) | ||
18 | #define CFGCHIP2_OTGMODE (3 << 13) | ||
19 | #define CFGCHIP2_NO_OVERRIDE (0 << 13) | ||
20 | #define CFGCHIP2_FORCE_HOST (1 << 13) | ||
21 | #define CFGCHIP2_FORCE_DEVICE (2 << 13) | ||
22 | #define CFGCHIP2_FORCE_HOST_VBUS_LOW (3 << 13) | ||
23 | #define CFGCHIP2_USB1PHYCLKMUX (1 << 12) | ||
24 | #define CFGCHIP2_USB2PHYCLKMUX (1 << 11) | ||
25 | #define CFGCHIP2_PHYPWRDN (1 << 10) | ||
26 | #define CFGCHIP2_OTGPWRDN (1 << 9) | ||
27 | #define CFGCHIP2_DATPOL (1 << 8) | ||
28 | #define CFGCHIP2_USB1SUSPENDM (1 << 7) | ||
29 | #define CFGCHIP2_PHY_PLLON (1 << 6) /* override PLL suspend */ | ||
30 | #define CFGCHIP2_SESENDEN (1 << 5) /* Vsess_end comparator */ | ||
31 | #define CFGCHIP2_VBDTCTEN (1 << 4) /* Vbus comparator */ | ||
32 | #define CFGCHIP2_REFFREQ (0xf << 0) | ||
33 | #define CFGCHIP2_REFFREQ_12MHZ (1 << 0) | ||
34 | #define CFGCHIP2_REFFREQ_24MHZ (2 << 0) | ||
35 | #define CFGCHIP2_REFFREQ_48MHZ (3 << 0) | ||
36 | |||
37 | #endif /* ifndef __ASM_ARCH_USB_H */ | ||