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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-05-24 19:11:25 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-05-24 19:11:25 -0400
commit014322dac6ae0048c928c6ca2faf0d53194f9d15 (patch)
tree6c4b40ddd4a754a9ce041d97ce8488b8a66ac50d /arch/arm/mach-davinci/include
parent03eb14199e8a2ff2bc170b283305990151b0d619 (diff)
parent1a717c00501f02200fa003755e54f9fcbd2f865b (diff)
Merge branch 'davinci-next' of git://gitorious.org/linux-davinci/linux-davinci into devel-stable
Diffstat (limited to 'arch/arm/mach-davinci/include')
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h4
-rw-r--r--arch/arm/mach-davinci/include/mach/hardware.h3
2 files changed, 0 insertions, 7 deletions
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index e4fc1af8500e..ad64da713fc8 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -64,13 +64,9 @@ extern unsigned int da850_max_speed;
64#define DA8XX_TIMER64P1_BASE 0x01c21000 64#define DA8XX_TIMER64P1_BASE 0x01c21000
65#define DA8XX_GPIO_BASE 0x01e26000 65#define DA8XX_GPIO_BASE 0x01e26000
66#define DA8XX_PSC1_BASE 0x01e27000 66#define DA8XX_PSC1_BASE 0x01e27000
67#define DA8XX_LCD_CNTRL_BASE 0x01e13000
68#define DA8XX_PLL1_BASE 0x01e1a000
69#define DA8XX_MMCSD0_BASE 0x01c40000
70#define DA8XX_AEMIF_CS2_BASE 0x60000000 67#define DA8XX_AEMIF_CS2_BASE 0x60000000
71#define DA8XX_AEMIF_CS3_BASE 0x62000000 68#define DA8XX_AEMIF_CS3_BASE 0x62000000
72#define DA8XX_AEMIF_CTL_BASE 0x68000000 69#define DA8XX_AEMIF_CTL_BASE 0x68000000
73#define DA8XX_DDR2_CTL_BASE 0xb0000000
74#define DA8XX_ARM_RAM_BASE 0xffff0000 70#define DA8XX_ARM_RAM_BASE 0xffff0000
75 71
76void __init da830_init(void); 72void __init da830_init(void);
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h
index c45ba1f62a11..414e0b93e741 100644
--- a/arch/arm/mach-davinci/include/mach/hardware.h
+++ b/arch/arm/mach-davinci/include/mach/hardware.h
@@ -21,9 +21,6 @@
21 */ 21 */
22#define DAVINCI_SYSTEM_MODULE_BASE 0x01C40000 22#define DAVINCI_SYSTEM_MODULE_BASE 0x01C40000
23 23
24/* System control register offsets */
25#define DM64XX_VDD3P3V_PWDN 0x48
26
27/* 24/*
28 * I/O mapping 25 * I/O mapping
29 */ 26 */