davinci: Adding DM365 SOC Support

The patch adds base support for new TI SOC DM365, which s
similar to the dm355.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

5 files changed, 172 insertions, 0 deletions

diff --git a/arch/arm/mach-davinci/include/mach/cputype.h b/arch/arm/mach-davinci/include/mach/cputype.h
index d12a5ed2959a..56b92d49e293 100644
--- a/arch/arm/mach-davinci/include/mach/cputype.h
+++ b/arch/arm/mach-davinci/include/mach/cputype.h
@@ -30,6 +30,7 @@ struct davinci_id {
 #define DAVINCI_CPU_ID_DM6446           0x64460000
 #define DAVINCI_CPU_ID_DM6467           0x64670000
 #define DAVINCI_CPU_ID_DM355            0x03550000
+#define DAVINCI_CPU_ID_DM365            0x03650000
 
 #define IS_DAVINCI_CPU(type, id)                                        \
 static inline int is_davinci_ ##type(void)                              \
@@ -40,6 +41,7 @@ static inline int is_davinci_ ##type(void)				\
 IS_DAVINCI_CPU(dm644x, DAVINCI_CPU_ID_DM6446)
 IS_DAVINCI_CPU(dm646x, DAVINCI_CPU_ID_DM6467)
 IS_DAVINCI_CPU(dm355, DAVINCI_CPU_ID_DM355)
+IS_DAVINCI_CPU(dm365, DAVINCI_CPU_ID_DM365)
 
 #ifdef CONFIG_ARCH_DAVINCI_DM644x
 #define cpu_is_davinci_dm644x() is_davinci_dm644x()
@@ -59,4 +61,10 @@ IS_DAVINCI_CPU(dm355, DAVINCI_CPU_ID_DM355)
 #define cpu_is_davinci_dm355() 0
 #endif
 
+#ifdef CONFIG_ARCH_DAVINCI_DM365
+#define cpu_is_davinci_dm365() is_davinci_dm365()
+#else
+#define cpu_is_davinci_dm365() 0
+#endif
+
 #endif
diff --git a/arch/arm/mach-davinci/include/mach/dm365.h b/arch/arm/mach-davinci/include/mach/dm365.h
new file mode 100644
index 000000000000..09db4343bb4c
--- /dev/null
+++ b/arch/arm/mach-davinci/include/mach/dm365.h
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2009 Texas Instruments Incorporated
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#ifndef __ASM_ARCH_DM365_H
+#define __ASM_ARCH_DM665_H
+
+#include <linux/platform_device.h>
+#include <mach/hardware.h>
+#include <mach/emac.h>
+
+#define DM365_EMAC_BASE                 (0x01D07000)
+#define DM365_EMAC_CNTRL_OFFSET         (0x0000)
+#define DM365_EMAC_CNTRL_MOD_OFFSET     (0x3000)
+#define DM365_EMAC_CNTRL_RAM_OFFSET     (0x1000)
+#define DM365_EMAC_MDIO_OFFSET          (0x4000)
+#define DM365_EMAC_CNTRL_RAM_SIZE       (0x2000)
+
+void __init dm365_init(void);
+
+#endif /* __ASM_ARCH_DM365_H */
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/include/mach/irqs.h
index bc5d6aaa69a3..0d34f2fb0993 100644
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/include/mach/irqs.h
@@ -206,4 +206,40 @@
 #define IRQ_DM355_GPIOBNK5      59
 #define IRQ_DM355_GPIOBNK6      60
 
+/* DaVinci DM365-specific Interrupts */
+#define IRQ_DM365_INSFINT       7
+#define IRQ_DM365_IMCOPINT      11
+#define IRQ_DM365_RTOINT        13
+#define IRQ_DM365_TINT5         14
+#define IRQ_DM365_TINT6         15
+#define IRQ_DM365_SPINT2_1      21
+#define IRQ_DM365_TINT7         22
+#define IRQ_DM365_SDIOINT0      23
+#define IRQ_DM365_MMCINT1       27
+#define IRQ_DM365_PWMINT3       28
+#define IRQ_DM365_SDIOINT1      31
+#define IRQ_DM365_SPIINT0_0     42
+#define IRQ_DM365_SPIINT3_0     43
+#define IRQ_DM365_GPIO0         44
+#define IRQ_DM365_GPIO1         45
+#define IRQ_DM365_GPIO2         46
+#define IRQ_DM365_GPIO3         47
+#define IRQ_DM365_GPIO4         48
+#define IRQ_DM365_GPIO5         49
+#define IRQ_DM365_GPIO6         50
+#define IRQ_DM365_GPIO7         51
+#define IRQ_DM365_EMAC_RXTHRESH 52
+#define IRQ_DM365_EMAC_RXPULSE  53
+#define IRQ_DM365_EMAC_TXPULSE  54
+#define IRQ_DM365_EMAC_MISCPULSE 55
+#define IRQ_DM365_GPIO12        56
+#define IRQ_DM365_GPIO13        57
+#define IRQ_DM365_GPIO14        58
+#define IRQ_DM365_GPIO15        59
+#define IRQ_DM365_ADCINT        59
+#define IRQ_DM365_KEYINT        60
+#define IRQ_DM365_TCERRINT2     61
+#define IRQ_DM365_TCERRINT3     62
+#define IRQ_DM365_EMUINT        63
+
 #endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h
index 27378458542f..c182bd458d73 100644
--- a/arch/arm/mach-davinci/include/mach/mux.h
+++ b/arch/arm/mach-davinci/include/mach/mux.h
@@ -156,6 +156,87 @@ enum davinci_dm355_index {
         DM355_EVT26_MMC0_RX,
 };
 
+enum davinci_dm365_index {
+        /* MMC/SD 0 */
+        DM365_MMCSD0,
+
+        /* MMC/SD 1 */
+        DM365_SD1_CLK,
+        DM365_SD1_CMD,
+        DM365_SD1_DATA3,
+        DM365_SD1_DATA2,
+        DM365_SD1_DATA1,
+        DM365_SD1_DATA0,
+
+        /* I2C */
+        DM365_I2C_SDA,
+        DM365_I2C_SCL,
+
+        /* AEMIF */
+        DM365_AEMIF_AR,
+        DM365_AEMIF_A3,
+        DM365_AEMIF_A7,
+        DM365_AEMIF_D15_8,
+        DM365_AEMIF_CE0,
+
+        /* ASP0 function */
+        DM365_MCBSP0_BDX,
+        DM365_MCBSP0_X,
+        DM365_MCBSP0_BFSX,
+        DM365_MCBSP0_BDR,
+        DM365_MCBSP0_R,
+        DM365_MCBSP0_BFSR,
+
+        /* SPI0 */
+        DM365_SPI0_SCLK,
+        DM365_SPI0_SDI,
+        DM365_SPI0_SDO,
+        DM365_SPI0_SDENA0,
+        DM365_SPI0_SDENA1,
+
+        /* UART */
+        DM365_UART0_RXD,
+        DM365_UART0_TXD,
+        DM365_UART1_RXD,
+        DM365_UART1_TXD,
+        DM365_UART1_RTS,
+        DM365_UART1_CTS,
+
+        /* EMAC */
+        DM365_EMAC_TX_EN,
+        DM365_EMAC_TX_CLK,
+        DM365_EMAC_COL,
+        DM365_EMAC_TXD3,
+        DM365_EMAC_TXD2,
+        DM365_EMAC_TXD1,
+        DM365_EMAC_TXD0,
+        DM365_EMAC_RXD3,
+        DM365_EMAC_RXD2,
+        DM365_EMAC_RXD1,
+        DM365_EMAC_RXD0,
+        DM365_EMAC_RX_CLK,
+        DM365_EMAC_RX_DV,
+        DM365_EMAC_RX_ER,
+        DM365_EMAC_CRS,
+        DM365_EMAC_MDIO,
+        DM365_EMAC_MDCLK,
+
+        /* IRQ muxing */
+        DM365_INT_EDMA_CC,
+        DM365_INT_EDMA_TC0_ERR,
+        DM365_INT_EDMA_TC1_ERR,
+        DM365_INT_PRTCSS,
+        DM365_INT_EMAC_RXTHRESH,
+        DM365_INT_EMAC_RXPULSE,
+        DM365_INT_EMAC_TXPULSE,
+        DM365_INT_EMAC_MISCPULSE,
+
+        /* EDMA event muxing */
+        DM365_EVT2_ASP_TX,
+        DM365_EVT3_ASP_RX,
+        DM365_EVT26_MMC0_RX,
+};
+
 #ifdef CONFIG_DAVINCI_MUX
 /* setup pin muxing */
 extern int davinci_cfg_reg(unsigned long reg_cfg);
diff --git a/arch/arm/mach-davinci/include/mach/psc.h b/arch/arm/mach-davinci/include/mach/psc.h
index ab8a2586d1cc..2bb414b14297 100644
--- a/arch/arm/mach-davinci/include/mach/psc.h
+++ b/arch/arm/mach-davinci/include/mach/psc.h
@@ -81,6 +81,24 @@
 #define DM355_LPSC_RTO                  12
 #define DM355_LPSC_VPSS_DAC             41
 
+/* DM365 */
+#define DM365_LPSC_TIMER3       5
+#define DM365_LPSC_SPI1         6
+#define DM365_LPSC_MMC_SD1      7
+#define DM365_LPSC_McBSP1       8
+#define DM365_LPSC_PWM3         10
+#define DM365_LPSC_SPI2         11
+#define DM365_LPSC_RTO          12
+#define DM365_LPSC_TIMER4       17
+#define DM365_LPSC_SPI0         22
+#define DM365_LPSC_SPI3         38
+#define DM365_LPSC_SPI4         39
+#define DM365_LPSC_EMAC         40
+#define DM365_LPSC_VOICE_CODEC  44
+#define DM365_LPSC_DAC_CLK      46
+#define DM365_LPSC_VPSSMSTR     47
+#define DM365_LPSC_MJCP         50
+
 /*
  * LPSC Assignments
  */