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authorSekhar Nori <nsekhar@ti.com>2009-08-31 06:18:05 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2009-11-25 13:21:21 -0500
commit5d36a3321bd77418cc55e05680efc35deeaba3f4 (patch)
tree9b43aeb209172c83413e153cf830b029b09230b8 /arch/arm/mach-davinci/include/mach/da8xx.h
parentb82a51e8ce560fece675b8e3ca652eee26a47789 (diff)
davinci: DA850/OMAP-L138: allow async3 source to be changed
The patch allows Async3 clock source to be selected between PLL1 SYSCLK2 and PLL0 SYSCLK2. Having Async3 source from PLL1 SYSCLK2 allows peripherals on that domain to remain unaffected by frequency scaling on PLL0. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/include/mach/da8xx.h')
-rw-r--r--arch/arm/mach-davinci/include/mach/da8xx.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index 6f036506bc68..ec2821bc38d2 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -34,6 +34,7 @@ extern void __iomem *da8xx_syscfg_base;
34#define DA8XX_SYSCFG_BASE (IO_PHYS + 0x14000) 34#define DA8XX_SYSCFG_BASE (IO_PHYS + 0x14000)
35#define DA8XX_SYSCFG_VIRT(x) (da8xx_syscfg_base + (x)) 35#define DA8XX_SYSCFG_VIRT(x) (da8xx_syscfg_base + (x))
36#define DA8XX_JTAG_ID_REG 0x18 36#define DA8XX_JTAG_ID_REG 0x18
37#define DA8XX_CFGCHIP3_REG 0x188
37 38
38#define DA8XX_PSC0_BASE 0x01c10000 39#define DA8XX_PSC0_BASE 0x01c10000
39#define DA8XX_PLL0_BASE 0x01c11000 40#define DA8XX_PLL0_BASE 0x01c11000