aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-davinci/gpio.c
diff options
context:
space:
mode:
authorDavid Brownell <dbrownell@users.sourceforge.net>2009-05-04 16:14:27 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2009-05-26 10:17:54 -0400
commitdf4aab46a8256ac0f0c2701b3fe23b7dd05e6b48 (patch)
tree3ac065f49b9f20d0e759b829824caf7553358e32 /arch/arm/mach-davinci/gpio.c
parent59a3759d0fe8d969888c741bb33f4946e4d3750d (diff)
davinci: gpio irq enable tweaks
Fix two IRQ triggering bugs affecting GPIO IRQs: - Make sure enabling with IRQ_TYPE_NONE ("default, unspecified") isn't a NOP ... default to both edges, at least one must work. - As noted by Kevin Hilman, setting the irq trigger type for a banked gpio interrupt shouldn't enable irqs that are disabled. Since GPIO IRQs haven't been used much yet, it's not clear these bugs could have affected anything. The few current users don't seem to have been obviously suffering from these issues. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/gpio.c')
-rw-r--r--arch/arm/mach-davinci/gpio.c20
1 files changed, 14 insertions, 6 deletions
diff --git a/arch/arm/mach-davinci/gpio.c b/arch/arm/mach-davinci/gpio.c
index 1aba41c6351e..34ba4ceda347 100644
--- a/arch/arm/mach-davinci/gpio.c
+++ b/arch/arm/mach-davinci/gpio.c
@@ -187,10 +187,15 @@ static void gpio_irq_enable(unsigned irq)
187{ 187{
188 struct gpio_controller *__iomem g = get_irq_chip_data(irq); 188 struct gpio_controller *__iomem g = get_irq_chip_data(irq);
189 u32 mask = __gpio_mask(irq_to_gpio(irq)); 189 u32 mask = __gpio_mask(irq_to_gpio(irq));
190 unsigned status = irq_desc[irq].status;
190 191
191 if (irq_desc[irq].status & IRQ_TYPE_EDGE_FALLING) 192 status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;
193 if (!status)
194 status = IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING;
195
196 if (status & IRQ_TYPE_EDGE_FALLING)
192 __raw_writel(mask, &g->set_falling); 197 __raw_writel(mask, &g->set_falling);
193 if (irq_desc[irq].status & IRQ_TYPE_EDGE_RISING) 198 if (status & IRQ_TYPE_EDGE_RISING)
194 __raw_writel(mask, &g->set_rising); 199 __raw_writel(mask, &g->set_rising);
195} 200}
196 201
@@ -205,10 +210,13 @@ static int gpio_irq_type(unsigned irq, unsigned trigger)
205 irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK; 210 irq_desc[irq].status &= ~IRQ_TYPE_SENSE_MASK;
206 irq_desc[irq].status |= trigger; 211 irq_desc[irq].status |= trigger;
207 212
208 __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING) 213 /* don't enable the IRQ if it's currently disabled */
209 ? &g->set_falling : &g->clr_falling); 214 if (irq_desc[irq].depth == 0) {
210 __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING) 215 __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING)
211 ? &g->set_rising : &g->clr_rising); 216 ? &g->set_falling : &g->clr_falling);
217 __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING)
218 ? &g->set_rising : &g->clr_rising);
219 }
212 return 0; 220 return 0;
213} 221}
214 222