aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-davinci/dm646x.c
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2013-09-06 16:30:06 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-09-06 16:30:06 -0400
commitb4b50fd78b1e31989940dfc647e64453d0f7176a (patch)
tree1a55f110e021c02963b63759f3f18ea7ba3aa228 /arch/arm/mach-davinci/dm646x.c
parentdccfd1e439c11422d7aca0d834b0430d24650e85 (diff)
parentf97c43bbdf8a1ea42477b1a804a48e7e368cb13c (diff)
Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Olof Johansson: "This branch contains mostly additions and changes to platform enablement and SoC-level drivers. Since there's sometimes a dependency on device-tree changes, there's also a fair amount of those in this branch. Pieces worth mentioning are: - Mbus driver for Marvell platforms, allowing kernel configuration and resource allocation of on-chip peripherals. - Enablement of the mbus infrastructure from Marvell PCI-e drivers. - Preparation of MSI support for Marvell platforms. - Addition of new PCI-e host controller driver for Tegra platforms - Some churn caused by sharing of macro names between i.MX 6Q and 6DL platforms in the device tree sources and header files. - Various suspend/PM updates for Tegra, including LP1 support. - Versatile Express support for MCPM, part of big little support. - Allwinner platform support for A20 and A31 SoCs (dual and quad Cortex-A7) - OMAP2+ support for DRA7, a new Cortex-A15-based SoC. The code that touches other architectures are patches moving MSI arch-specific functions over to weak symbols and removal of ARCH_SUPPORTS_MSI, acked by PCI maintainers" * tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (266 commits) tegra-cpuidle: provide stub when !CONFIG_CPU_IDLE PCI: tegra: replace devm_request_and_ioremap by devm_ioremap_resource ARM: tegra: Drop ARCH_SUPPORTS_MSI and sort list ARM: dts: vf610-twr: enable i2c0 device ARM: dts: i.MX51: Add one more I2C2 pinmux entry ARM: dts: i.MX51: Move pins configuration under "iomuxc" label ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator ARM: dts: imx27-phytec-phycore-som: Enable AUDMUX ARM: dts: i.MX27: Disable AUDMUX in the template ARM: dts: wandboard: Add support for SDIO bcm4329 ARM: i.MX5 clocks: Remove optional clock setup (CKIH1) from i.MX51 template ARM: dts: imx53-qsb: Make USBH1 functional ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module ARM: dts: imx6qdl-sabresd: Add touchscreen support ARM: imx: add ocram clock for imx53 ARM: dts: imx: ocram size is different between imx6q and imx6dl ARM: dts: imx27-phytec-phycore-som: Fix regulator settings ARM: dts: i.MX27: Remove clock name from CPU node ...
Diffstat (limited to 'arch/arm/mach-davinci/dm646x.c')
-rw-r--r--arch/arm/mach-davinci/dm646x.c54
1 files changed, 40 insertions, 14 deletions
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index d1259e80141b..68f8d1f1aca1 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -342,15 +342,16 @@ static struct clk_lookup dm646x_clks[] = {
342 CLK(NULL, "edma_tc1", &edma_tc1_clk), 342 CLK(NULL, "edma_tc1", &edma_tc1_clk),
343 CLK(NULL, "edma_tc2", &edma_tc2_clk), 343 CLK(NULL, "edma_tc2", &edma_tc2_clk),
344 CLK(NULL, "edma_tc3", &edma_tc3_clk), 344 CLK(NULL, "edma_tc3", &edma_tc3_clk),
345 CLK(NULL, "uart0", &uart0_clk), 345 CLK("serial8250.0", NULL, &uart0_clk),
346 CLK(NULL, "uart1", &uart1_clk), 346 CLK("serial8250.1", NULL, &uart1_clk),
347 CLK(NULL, "uart2", &uart2_clk), 347 CLK("serial8250.2", NULL, &uart2_clk),
348 CLK("i2c_davinci.1", NULL, &i2c_clk), 348 CLK("i2c_davinci.1", NULL, &i2c_clk),
349 CLK(NULL, "gpio", &gpio_clk), 349 CLK(NULL, "gpio", &gpio_clk),
350 CLK("davinci-mcasp.0", NULL, &mcasp0_clk), 350 CLK("davinci-mcasp.0", NULL, &mcasp0_clk),
351 CLK("davinci-mcasp.1", NULL, &mcasp1_clk), 351 CLK("davinci-mcasp.1", NULL, &mcasp1_clk),
352 CLK(NULL, "aemif", &aemif_clk), 352 CLK(NULL, "aemif", &aemif_clk),
353 CLK("davinci_emac.1", NULL, &emac_clk), 353 CLK("davinci_emac.1", NULL, &emac_clk),
354 CLK("davinci_mdio.0", "fck", &emac_clk),
354 CLK(NULL, "pwm0", &pwm0_clk), 355 CLK(NULL, "pwm0", &pwm0_clk),
355 CLK(NULL, "pwm1", &pwm1_clk), 356 CLK(NULL, "pwm1", &pwm1_clk),
356 CLK(NULL, "timer0", &timer0_clk), 357 CLK(NULL, "timer0", &timer0_clk),
@@ -790,7 +791,7 @@ static struct davinci_timer_info dm646x_timer_info = {
790 .clocksource_id = T0_TOP, 791 .clocksource_id = T0_TOP,
791}; 792};
792 793
793static struct plat_serial8250_port dm646x_serial_platform_data[] = { 794static struct plat_serial8250_port dm646x_serial0_platform_data[] = {
794 { 795 {
795 .mapbase = DAVINCI_UART0_BASE, 796 .mapbase = DAVINCI_UART0_BASE,
796 .irq = IRQ_UARTINT0, 797 .irq = IRQ_UARTINT0,
@@ -800,6 +801,11 @@ static struct plat_serial8250_port dm646x_serial_platform_data[] = {
800 .regshift = 2, 801 .regshift = 2,
801 }, 802 },
802 { 803 {
804 .flags = 0,
805 }
806};
807static struct plat_serial8250_port dm646x_serial1_platform_data[] = {
808 {
803 .mapbase = DAVINCI_UART1_BASE, 809 .mapbase = DAVINCI_UART1_BASE,
804 .irq = IRQ_UARTINT1, 810 .irq = IRQ_UARTINT1,
805 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | 811 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
@@ -808,6 +814,11 @@ static struct plat_serial8250_port dm646x_serial_platform_data[] = {
808 .regshift = 2, 814 .regshift = 2,
809 }, 815 },
810 { 816 {
817 .flags = 0,
818 }
819};
820static struct plat_serial8250_port dm646x_serial2_platform_data[] = {
821 {
811 .mapbase = DAVINCI_UART2_BASE, 822 .mapbase = DAVINCI_UART2_BASE,
812 .irq = IRQ_DM646X_UARTINT2, 823 .irq = IRQ_DM646X_UARTINT2,
813 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | 824 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
@@ -816,16 +827,34 @@ static struct plat_serial8250_port dm646x_serial_platform_data[] = {
816 .regshift = 2, 827 .regshift = 2,
817 }, 828 },
818 { 829 {
819 .flags = 0 830 .flags = 0,
820 }, 831 }
821}; 832};
822 833
823static struct platform_device dm646x_serial_device = { 834struct platform_device dm646x_serial_device[] = {
824 .name = "serial8250", 835 {
825 .id = PLAT8250_DEV_PLATFORM, 836 .name = "serial8250",
826 .dev = { 837 .id = PLAT8250_DEV_PLATFORM,
827 .platform_data = dm646x_serial_platform_data, 838 .dev = {
839 .platform_data = dm646x_serial0_platform_data,
840 }
841 },
842 {
843 .name = "serial8250",
844 .id = PLAT8250_DEV_PLATFORM1,
845 .dev = {
846 .platform_data = dm646x_serial1_platform_data,
847 }
828 }, 848 },
849 {
850 .name = "serial8250",
851 .id = PLAT8250_DEV_PLATFORM2,
852 .dev = {
853 .platform_data = dm646x_serial2_platform_data,
854 }
855 },
856 {
857 }
829}; 858};
830 859
831static struct davinci_soc_info davinci_soc_info_dm646x = { 860static struct davinci_soc_info davinci_soc_info_dm646x = {
@@ -849,7 +878,6 @@ static struct davinci_soc_info davinci_soc_info_dm646x = {
849 .gpio_base = DAVINCI_GPIO_BASE, 878 .gpio_base = DAVINCI_GPIO_BASE,
850 .gpio_num = 43, /* Only 33 usable */ 879 .gpio_num = 43, /* Only 33 usable */
851 .gpio_irq = IRQ_DM646X_GPIOBNK0, 880 .gpio_irq = IRQ_DM646X_GPIOBNK0,
852 .serial_dev = &dm646x_serial_device,
853 .emac_pdata = &dm646x_emac_pdata, 881 .emac_pdata = &dm646x_emac_pdata,
854 .sram_dma = 0x10010000, 882 .sram_dma = 0x10010000,
855 .sram_len = SZ_32K, 883 .sram_len = SZ_32K,
@@ -913,8 +941,6 @@ static int __init dm646x_init_devices(void)
913 941
914 platform_device_register(&dm646x_mdio_device); 942 platform_device_register(&dm646x_mdio_device);
915 platform_device_register(&dm646x_emac_device); 943 platform_device_register(&dm646x_emac_device);
916 clk_add_alias(NULL, dev_name(&dm646x_mdio_device.dev),
917 NULL, &dm646x_emac_device.dev);
918 944
919 return 0; 945 return 0;
920} 946}