diff options
author | Sudhakar Rajashekhara <sudhakar.raj@ti.com> | 2009-05-21 07:41:35 -0400 |
---|---|---|
committer | Kevin Hilman <khilman@deeprootsystems.com> | 2009-08-26 03:56:56 -0400 |
commit | 60902a2cb12c3c1682ee7a04ad7448ec16dc0c29 (patch) | |
tree | ba754bff7fadd7106dc9f8549136a514177d0fd1 /arch/arm/mach-davinci/dm646x.c | |
parent | 4c5adde7943b982d22a7bf711654fbb5cb810667 (diff) |
davinci: EDMA: multiple CCs, channel mapping and API changes
- restructure to support multiple channel controllers by using
additional struct resources for each CC
- interface changes visible to EDMA clients
Introduce macros to build IDs from controller and channel number,
and to extract them. Modify the edma_alloc_slot function to take an
extra argument for the controller.
Also update ASoC drivers to use API. ASoC changes
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
- Move queue related mappings to dm<soc>.c
EDMA in DM355 and DM644x has two transfer controllers while DM646x
has four transfer controllers. Moving the queue to tc mapping and
queue priority mapping to dm<soc>.c will be helpful to probe these
mappings from platform device so that the machine_is_* testing will
be avoided.
- add channel mapping logic
Channel mapping logic is introduced in dm646x EDMA. This implies
that there is no fixed association for a channel number to a
parameter entry number. In other words, using the DMA channel
mapping registers (DCHMAPn), a PaRAM entry can be mapped to any
channel. While in the case of dm644x and dm355 there is a fixed
mapping between the EDMA channel and Param entry number.
Signed-off-by: Naresh Medisetty <naresh@ti.com>
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Reviewed-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/dm646x.c')
-rw-r--r-- | arch/arm/mach-davinci/dm646x.c | 46 |
1 files changed, 37 insertions, 9 deletions
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c index 334f0711e0f5..e2410738327c 100644 --- a/arch/arm/mach-davinci/dm646x.c +++ b/arch/arm/mach-davinci/dm646x.c | |||
@@ -451,17 +451,43 @@ static const s8 dma_chan_dm646x_no_event[] = { | |||
451 | -1 | 451 | -1 |
452 | }; | 452 | }; |
453 | 453 | ||
454 | static struct edma_soc_info dm646x_edma_info = { | 454 | /* Four Transfer Controllers on DM646x */ |
455 | .n_channel = 64, | 455 | static const s8 |
456 | .n_region = 6, /* 0-1, 4-7 */ | 456 | dm646x_queue_tc_mapping[][2] = { |
457 | .n_slot = 512, | 457 | /* {event queue no, TC no} */ |
458 | .n_tc = 4, | 458 | {0, 0}, |
459 | .noevent = dma_chan_dm646x_no_event, | 459 | {1, 1}, |
460 | {2, 2}, | ||
461 | {3, 3}, | ||
462 | {-1, -1}, | ||
463 | }; | ||
464 | |||
465 | static const s8 | ||
466 | dm646x_queue_priority_mapping[][2] = { | ||
467 | /* {event queue no, Priority} */ | ||
468 | {0, 4}, | ||
469 | {1, 0}, | ||
470 | {2, 5}, | ||
471 | {3, 1}, | ||
472 | {-1, -1}, | ||
473 | }; | ||
474 | |||
475 | static struct edma_soc_info dm646x_edma_info[] = { | ||
476 | { | ||
477 | .n_channel = 64, | ||
478 | .n_region = 6, /* 0-1, 4-7 */ | ||
479 | .n_slot = 512, | ||
480 | .n_tc = 4, | ||
481 | .n_cc = 1, | ||
482 | .noevent = dma_chan_dm646x_no_event, | ||
483 | .queue_tc_mapping = dm646x_queue_tc_mapping, | ||
484 | .queue_priority_mapping = dm646x_queue_priority_mapping, | ||
485 | }, | ||
460 | }; | 486 | }; |
461 | 487 | ||
462 | static struct resource edma_resources[] = { | 488 | static struct resource edma_resources[] = { |
463 | { | 489 | { |
464 | .name = "edma_cc", | 490 | .name = "edma_cc0", |
465 | .start = 0x01c00000, | 491 | .start = 0x01c00000, |
466 | .end = 0x01c00000 + SZ_64K - 1, | 492 | .end = 0x01c00000 + SZ_64K - 1, |
467 | .flags = IORESOURCE_MEM, | 493 | .flags = IORESOURCE_MEM, |
@@ -491,10 +517,12 @@ static struct resource edma_resources[] = { | |||
491 | .flags = IORESOURCE_MEM, | 517 | .flags = IORESOURCE_MEM, |
492 | }, | 518 | }, |
493 | { | 519 | { |
520 | .name = "edma0", | ||
494 | .start = IRQ_CCINT0, | 521 | .start = IRQ_CCINT0, |
495 | .flags = IORESOURCE_IRQ, | 522 | .flags = IORESOURCE_IRQ, |
496 | }, | 523 | }, |
497 | { | 524 | { |
525 | .name = "edma0_err", | ||
498 | .start = IRQ_CCERRINT, | 526 | .start = IRQ_CCERRINT, |
499 | .flags = IORESOURCE_IRQ, | 527 | .flags = IORESOURCE_IRQ, |
500 | }, | 528 | }, |
@@ -503,8 +531,8 @@ static struct resource edma_resources[] = { | |||
503 | 531 | ||
504 | static struct platform_device dm646x_edma_device = { | 532 | static struct platform_device dm646x_edma_device = { |
505 | .name = "edma", | 533 | .name = "edma", |
506 | .id = -1, | 534 | .id = 0, |
507 | .dev.platform_data = &dm646x_edma_info, | 535 | .dev.platform_data = dm646x_edma_info, |
508 | .num_resources = ARRAY_SIZE(edma_resources), | 536 | .num_resources = ARRAY_SIZE(edma_resources), |
509 | .resource = edma_resources, | 537 | .resource = edma_resources, |
510 | }; | 538 | }; |