ARM: davinci: Explicitly set channel controllers' default queues

Davinci platforms may define a default queue for each channel
controller. If one is not defined, the default queue is set to EVENTQ_1.
However, there's no way to distinguish between an unset default queue to
one that is set to EVENTQ_0, as EVENTQ_0 = 0.

Explicitly specify the default queue for all channel controllers on all
Davinci platforms to EVENTQ_1, and don't overwrite it in the EDMA probe
function.

One exception is the DA850 board, for which EVENTQ_1 is not a valid
option for its second channel controller. Use EVENTQ_0 instead for that
channel controller.

Signed-off-by: Ido Yariv <ido@wizery.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 4c82c2716293..555ff5bdb220 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -514,6 +514,7 @@ static struct edma_soc_info edma_cc0_info = {
         .n_cc                   = 1,
         .queue_tc_mapping       = queue_tc_mapping,
         .queue_priority_mapping = queue_priority_mapping,
+        .default_queue          = EVENTQ_1,
 };
 
 static struct edma_soc_info *dm644x_edma_info[EDMA_MAX_CC] = {