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authorHans Verkuil <hans.verkuil@cisco.com>2012-10-01 10:39:46 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2012-10-05 13:27:18 -0400
commit368640827c0be2582d836cd74ae2cff03e6bfc02 (patch)
tree1012c886f4ce621b6d9284ffac81f3b79c3a95f7 /arch/arm/mach-davinci/dm644x.c
parent182b967e1119d22889e334c8f1c1b75df41f9165 (diff)
[media] dm644x: replace the obsolete preset API by the timings API
This patch replaces the preset API by the timings API, and appropriate changes in board file. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Acked-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'arch/arm/mach-davinci/dm644x.c')
-rw-r--r--arch/arm/mach-davinci/dm644x.c17
1 files changed, 4 insertions, 13 deletions
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index c8b866657fcb..79d2880c9d2d 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -701,7 +701,7 @@ static struct resource dm644x_venc_resources[] = {
701#define DM644X_VPSS_DACCLKEN BIT(4) 701#define DM644X_VPSS_DACCLKEN BIT(4)
702 702
703static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type, 703static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
704 unsigned int mode) 704 unsigned int pclock)
705{ 705{
706 int ret = 0; 706 int ret = 0;
707 u32 v = DM644X_VPSS_VENCLKEN; 707 u32 v = DM644X_VPSS_VENCLKEN;
@@ -711,27 +711,18 @@ static int dm644x_venc_setup_clock(enum vpbe_enc_timings_type type,
711 v |= DM644X_VPSS_DACCLKEN; 711 v |= DM644X_VPSS_DACCLKEN;
712 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); 712 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
713 break; 713 break;
714 case VPBE_ENC_DV_PRESET: 714 case VPBE_ENC_CUSTOM_TIMINGS:
715 switch (mode) { 715 if (pclock <= 27000000) {
716 case V4L2_DV_480P59_94:
717 case V4L2_DV_576P50:
718 v |= DM644X_VPSS_MUXSEL_PLL2_MODE | 716 v |= DM644X_VPSS_MUXSEL_PLL2_MODE |
719 DM644X_VPSS_DACCLKEN; 717 DM644X_VPSS_DACCLKEN;
720 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); 718 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
721 break; 719 } else {
722 case V4L2_DV_720P60:
723 case V4L2_DV_1080I60:
724 case V4L2_DV_1080P30:
725 /* 720 /*
726 * For HD, use external clock source since 721 * For HD, use external clock source since
727 * HD requires higher clock rate 722 * HD requires higher clock rate
728 */ 723 */
729 v |= DM644X_VPSS_MUXSEL_VPBECLK_MODE; 724 v |= DM644X_VPSS_MUXSEL_VPBECLK_MODE;
730 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL)); 725 writel(v, DAVINCI_SYSMOD_VIRT(SYSMOD_VPSS_CLKCTL));
731 break;
732 default:
733 ret = -EINVAL;
734 break;
735 } 726 }
736 break; 727 break;
737 default: 728 default: