davinci: EDMA: multiple CCs, channel mapping and API changes

- restructure to support multiple channel controllers by using
  additional struct resources for each CC

- interface changes visible to EDMA clients

  Introduce macros to build IDs from controller and channel number,
  and to extract them. Modify the edma_alloc_slot function to take an
  extra argument for the controller.

  Also update ASoC drivers to use API.  ASoC changes
  Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

- Move queue related mappings to dm<soc>.c

  EDMA in DM355 and DM644x has two transfer controllers while DM646x
  has four transfer controllers. Moving the queue to tc mapping and
  queue priority mapping to dm<soc>.c will be helpful to probe these
  mappings from platform device so that the machine_is_* testing will
  be avoided.

- add channel mapping logic

  Channel mapping logic is introduced in dm646x EDMA. This implies
  that there is no fixed association for a channel number to a
  parameter entry number. In other words, using the DMA channel
  mapping registers (DCHMAPn), a PaRAM entry can be mapped to any
  channel. While in the case of dm644x and dm355 there is a fixed
  mapping between the EDMA channel and Param entry number.

Signed-off-by: Naresh Medisetty <naresh@ti.com>
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Reviewed-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

1 files changed, 32 insertions, 9 deletions

diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index fb5449b3c97b..d145c0cbfe6a 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -484,17 +484,38 @@ static const s8 dma_chan_dm644x_no_event[] = {
         -1
 };
 
-static struct edma_soc_info dm644x_edma_info = {
-        .n_channel      = 64,
-        .n_region       = 4,
-        .n_slot         = 128,
-        .n_tc           = 2,
-        .noevent        = dma_chan_dm644x_no_event,
+static const s8
+queue_tc_mapping[][2] = {
+        /* {event queue no, TC no} */
+        {0, 0},
+        {1, 1},
+        {-1, -1},
+};
+
+static const s8
+queue_priority_mapping[][2] = {
+        /* {event queue no, Priority} */
+        {0, 3},
+        {1, 7},
+        {-1, -1},
+};
+
+static struct edma_soc_info dm644x_edma_info[] = {
+        {
+                .n_channel              = 64,
+                .n_region               = 4,
+                .n_slot                 = 128,
+                .n_tc                   = 2,
+                .n_cc                   = 1,
+                .noevent                = dma_chan_dm644x_no_event,
+                .queue_tc_mapping       = queue_tc_mapping,
+                .queue_priority_mapping = queue_priority_mapping,
+        },
 };
 
 static struct resource edma_resources[] = {
         {
-                .name   = "edma_cc",
+                .name   = "edma_cc0",
                 .start  = 0x01c00000,
                 .end    = 0x01c00000 + SZ_64K - 1,
                 .flags  = IORESOURCE_MEM,
@@ -512,10 +533,12 @@ static struct resource edma_resources[] = {
                 .flags  = IORESOURCE_MEM,
         },
         {
+                .name   = "edma0",
                 .start  = IRQ_CCINT0,
                 .flags  = IORESOURCE_IRQ,
         },
         {
+                .name   = "edma0_err",
                 .start  = IRQ_CCERRINT,
                 .flags  = IORESOURCE_IRQ,
         },
@@ -524,8 +547,8 @@ static struct resource edma_resources[] = {
 
 static struct platform_device dm644x_edma_device = {
         .name                   = "edma",
-        .id                     = -1,
-        .dev.platform_data      = &dm644x_edma_info,
+        .id                     = 0,
+        .dev.platform_data      = dm644x_edma_info,
         .num_resources          = ARRAY_SIZE(edma_resources),
         .resource               = edma_resources,
 };