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authorLinus Torvalds <torvalds@linux-foundation.org>2010-03-01 16:05:40 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2010-03-01 16:05:40 -0500
commit13dda80e48439b446d0bc9bab34b91484bc8f533 (patch)
treee8037122d65fe2a5dd8f633a7648b2597640a2ce /arch/arm/mach-davinci/dm644x.c
parent379e3a820da171cb1d97e8dccd736a69cebfb7c0 (diff)
parent5f19daa16ffca55db5b0253eba2bd0f71ee7f7f4 (diff)
Merge branch 'davinci-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci
* 'davinci-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci: (40 commits) DaVinci DM365: Adding support for SPI EEPROM DaVinci DM365: Adding DM365 SPI support DaVinci DM355: Modifications to DM355 SPI support DaVinci: SPI: Adding header file for SPI support. davinci: dm646x: CDCE clocks: davinci_clk converted to clk_lookup davinci: clkdev cleanup: remove clk_lookup wrapper, use clkdev_add_table() DaVinci: DM365: Voice codec support for the DM365 SoC davinci: clock: let clk->set_rate function sleep Add SDA and SCL pin numbers to i2c platform data davinci: da8xx/omap-l1xx: Add EDMA platform data for da850/omap-l138 davinci: build list of unused EDMA events dynamically davinci: Fix edma_alloc_channel api for EDMA_CHANNEL_ANY case davinci: Keep count of channel controllers on a platform davinci: Correct return value of edma_alloc_channel api davinci: add CDCE949 support on DM6467 EVM davinci: add support for CDCE949 clock synthesizer davinci: da850/omap-l138 EVM: register for suspend support davinci: da850/omap-l138: add support for SoC suspend davinci: add power management support DaVinci: DM365: Changing default queue for DM365. ...
Diffstat (limited to 'arch/arm/mach-davinci/dm644x.c')
-rw-r--r--arch/arm/mach-davinci/dm644x.c12
1 files changed, 1 insertions, 11 deletions
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 92aeb5600680..2f2ae8bc77bb 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -277,7 +277,7 @@ static struct clk timer2_clk = {
277 .usecount = 1, /* REVISIT: why cant' this be disabled? */ 277 .usecount = 1, /* REVISIT: why cant' this be disabled? */
278}; 278};
279 279
280struct davinci_clk dm644x_clks[] = { 280struct clk_lookup dm644x_clks[] = {
281 CLK(NULL, "ref", &ref_clk), 281 CLK(NULL, "ref", &ref_clk),
282 CLK(NULL, "pll1", &pll1_clk), 282 CLK(NULL, "pll1", &pll1_clk),
283 CLK(NULL, "pll1_sysclk1", &pll1_sysclk1), 283 CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
@@ -479,15 +479,6 @@ static u8 dm644x_default_priorities[DAVINCI_N_AINTC_IRQ] = {
479 479
480/*----------------------------------------------------------------------*/ 480/*----------------------------------------------------------------------*/
481 481
482static const s8 dma_chan_dm644x_no_event[] = {
483 0, 1, 12, 13, 14,
484 15, 25, 30, 31, 45,
485 46, 47, 55, 56, 57,
486 58, 59, 60, 61, 62,
487 63,
488 -1
489};
490
491static const s8 482static const s8
492queue_tc_mapping[][2] = { 483queue_tc_mapping[][2] = {
493 /* {event queue no, TC no} */ 484 /* {event queue no, TC no} */
@@ -511,7 +502,6 @@ static struct edma_soc_info dm644x_edma_info[] = {
511 .n_slot = 128, 502 .n_slot = 128,
512 .n_tc = 2, 503 .n_tc = 2,
513 .n_cc = 1, 504 .n_cc = 1,
514 .noevent = dma_chan_dm644x_no_event,
515 .queue_tc_mapping = queue_tc_mapping, 505 .queue_tc_mapping = queue_tc_mapping,
516 .queue_priority_mapping = queue_priority_mapping, 506 .queue_priority_mapping = queue_priority_mapping,
517 }, 507 },