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authorLinus Torvalds <torvalds@linux-foundation.org>2010-03-01 16:05:40 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2010-03-01 16:05:40 -0500
commit13dda80e48439b446d0bc9bab34b91484bc8f533 (patch)
treee8037122d65fe2a5dd8f633a7648b2597640a2ce /arch/arm/mach-davinci/dm355.c
parent379e3a820da171cb1d97e8dccd736a69cebfb7c0 (diff)
parent5f19daa16ffca55db5b0253eba2bd0f71ee7f7f4 (diff)
Merge branch 'davinci-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci
* 'davinci-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci: (40 commits) DaVinci DM365: Adding support for SPI EEPROM DaVinci DM365: Adding DM365 SPI support DaVinci DM355: Modifications to DM355 SPI support DaVinci: SPI: Adding header file for SPI support. davinci: dm646x: CDCE clocks: davinci_clk converted to clk_lookup davinci: clkdev cleanup: remove clk_lookup wrapper, use clkdev_add_table() DaVinci: DM365: Voice codec support for the DM365 SoC davinci: clock: let clk->set_rate function sleep Add SDA and SCL pin numbers to i2c platform data davinci: da8xx/omap-l1xx: Add EDMA platform data for da850/omap-l138 davinci: build list of unused EDMA events dynamically davinci: Fix edma_alloc_channel api for EDMA_CHANNEL_ANY case davinci: Keep count of channel controllers on a platform davinci: Correct return value of edma_alloc_channel api davinci: add CDCE949 support on DM6467 EVM davinci: add support for CDCE949 clock synthesizer davinci: da850/omap-l138 EVM: register for suspend support davinci: da850/omap-l138: add support for SoC suspend davinci: add power management support DaVinci: DM365: Changing default queue for DM365. ...
Diffstat (limited to 'arch/arm/mach-davinci/dm355.c')
-rw-r--r--arch/arm/mach-davinci/dm355.c49
1 files changed, 29 insertions, 20 deletions
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index d84e85414d20..3dc0a88712eb 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -29,6 +29,7 @@
29#include <mach/serial.h> 29#include <mach/serial.h>
30#include <mach/common.h> 30#include <mach/common.h>
31#include <mach/asp.h> 31#include <mach/asp.h>
32#include <mach/spi.h>
32 33
33#include "clock.h" 34#include "clock.h"
34#include "mux.h" 35#include "mux.h"
@@ -334,7 +335,7 @@ static struct clk usb_clk = {
334 .lpsc = DAVINCI_LPSC_USB, 335 .lpsc = DAVINCI_LPSC_USB,
335}; 336};
336 337
337static struct davinci_clk dm355_clks[] = { 338static struct clk_lookup dm355_clks[] = {
338 CLK(NULL, "ref", &ref_clk), 339 CLK(NULL, "ref", &ref_clk),
339 CLK(NULL, "pll1", &pll1_clk), 340 CLK(NULL, "pll1", &pll1_clk),
340 CLK(NULL, "pll1_sysclk1", &pll1_sysclk1), 341 CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
@@ -362,9 +363,9 @@ static struct davinci_clk dm355_clks[] = {
362 CLK("davinci-asp.1", NULL, &asp1_clk), 363 CLK("davinci-asp.1", NULL, &asp1_clk),
363 CLK("davinci_mmc.0", NULL, &mmcsd0_clk), 364 CLK("davinci_mmc.0", NULL, &mmcsd0_clk),
364 CLK("davinci_mmc.1", NULL, &mmcsd1_clk), 365 CLK("davinci_mmc.1", NULL, &mmcsd1_clk),
365 CLK(NULL, "spi0", &spi0_clk), 366 CLK("spi_davinci.0", NULL, &spi0_clk),
366 CLK(NULL, "spi1", &spi1_clk), 367 CLK("spi_davinci.1", NULL, &spi1_clk),
367 CLK(NULL, "spi2", &spi2_clk), 368 CLK("spi_davinci.2", NULL, &spi2_clk),
368 CLK(NULL, "gpio", &gpio_clk), 369 CLK(NULL, "gpio", &gpio_clk),
369 CLK(NULL, "aemif", &aemif_clk), 370 CLK(NULL, "aemif", &aemif_clk),
370 CLK(NULL, "pwm0", &pwm0_clk), 371 CLK(NULL, "pwm0", &pwm0_clk),
@@ -391,24 +392,40 @@ static struct resource dm355_spi0_resources[] = {
391 .flags = IORESOURCE_MEM, 392 .flags = IORESOURCE_MEM,
392 }, 393 },
393 { 394 {
394 .start = IRQ_DM355_SPINT0_1, 395 .start = IRQ_DM355_SPINT0_0,
395 .flags = IORESOURCE_IRQ, 396 .flags = IORESOURCE_IRQ,
396 }, 397 },
397 /* Not yet used, so not included: 398 {
398 * IORESOURCE_IRQ: 399 .start = 17,
399 * - IRQ_DM355_SPINT0_0 400 .flags = IORESOURCE_DMA,
400 * IORESOURCE_DMA: 401 },
401 * - DAVINCI_DMA_SPI_SPIX 402 {
402 * - DAVINCI_DMA_SPI_SPIR 403 .start = 16,
403 */ 404 .flags = IORESOURCE_DMA,
405 },
406 {
407 .start = EVENTQ_1,
408 .flags = IORESOURCE_DMA,
409 },
404}; 410};
405 411
412static struct davinci_spi_platform_data dm355_spi0_pdata = {
413 .version = SPI_VERSION_1,
414 .num_chipselect = 2,
415 .clk_internal = 1,
416 .cs_hold = 1,
417 .intr_level = 0,
418 .poll_mode = 1, /* 0 -> interrupt mode 1-> polling mode */
419 .c2tdelay = 0,
420 .t2cdelay = 0,
421};
406static struct platform_device dm355_spi0_device = { 422static struct platform_device dm355_spi0_device = {
407 .name = "spi_davinci", 423 .name = "spi_davinci",
408 .id = 0, 424 .id = 0,
409 .dev = { 425 .dev = {
410 .dma_mask = &dm355_spi0_dma_mask, 426 .dma_mask = &dm355_spi0_dma_mask,
411 .coherent_dma_mask = DMA_BIT_MASK(32), 427 .coherent_dma_mask = DMA_BIT_MASK(32),
428 .platform_data = &dm355_spi0_pdata,
412 }, 429 },
413 .num_resources = ARRAY_SIZE(dm355_spi0_resources), 430 .num_resources = ARRAY_SIZE(dm355_spi0_resources),
414 .resource = dm355_spi0_resources, 431 .resource = dm355_spi0_resources,
@@ -563,13 +580,6 @@ static u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = {
563 580
564/*----------------------------------------------------------------------*/ 581/*----------------------------------------------------------------------*/
565 582
566static const s8 dma_chan_dm355_no_event[] = {
567 12, 13, 24, 56, 57,
568 58, 59, 60, 61, 62,
569 63,
570 -1
571};
572
573static const s8 583static const s8
574queue_tc_mapping[][2] = { 584queue_tc_mapping[][2] = {
575 /* {event queue no, TC no} */ 585 /* {event queue no, TC no} */
@@ -593,7 +603,6 @@ static struct edma_soc_info dm355_edma_info[] = {
593 .n_slot = 128, 603 .n_slot = 128,
594 .n_tc = 2, 604 .n_tc = 2,
595 .n_cc = 1, 605 .n_cc = 1,
596 .noevent = dma_chan_dm355_no_event,
597 .queue_tc_mapping = queue_tc_mapping, 606 .queue_tc_mapping = queue_tc_mapping,
598 .queue_priority_mapping = queue_priority_mapping, 607 .queue_priority_mapping = queue_priority_mapping,
599 }, 608 },