diff options
author | Michael Williamson <[michael.williamson@criticallink.com]> | 2011-02-23 23:48:28 -0500 |
---|---|---|
committer | Kevin Hilman <khilman@ti.com> | 2011-03-11 13:48:29 -0500 |
commit | 54ce6883d29630ff334bee4256a25e3f8719a181 (patch) | |
tree | da62a6a9f2a18f43b0a6dbc5458af72d6d4f96b6 /arch/arm/mach-davinci/devices-da8xx.c | |
parent | 12d35cf374a2ca116481d2bc2dcf6f89854646dd (diff) |
davinci: da8xx: add spi resources and registration routine
Add IO resource structures, platform data, and a registration
routine in order to support spi device on DA850/OMAP-L138/AM18x
and DA830/OMAP-L137/AM17x platforms.
Signed-off-by: Michael Williamson <michael.williamson@criticallink.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-davinci/devices-da8xx.c')
-rw-r--r-- | arch/arm/mach-davinci/devices-da8xx.c | 104 |
1 files changed, 104 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 9b1ecfb3905d..ec7e84b21143 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
@@ -38,14 +38,20 @@ | |||
38 | #define DA8XX_EMAC_MDIO_BASE 0x01e24000 | 38 | #define DA8XX_EMAC_MDIO_BASE 0x01e24000 |
39 | #define DA8XX_GPIO_BASE 0x01e26000 | 39 | #define DA8XX_GPIO_BASE 0x01e26000 |
40 | #define DA8XX_I2C1_BASE 0x01e28000 | 40 | #define DA8XX_I2C1_BASE 0x01e28000 |
41 | #define DA8XX_SPI0_BASE 0x01c41000 | ||
42 | #define DA8XX_SPI1_BASE 0x01f0e000 | ||
41 | 43 | ||
42 | #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 | 44 | #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 |
43 | #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 | 45 | #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 |
44 | #define DA8XX_EMAC_RAM_OFFSET 0x0000 | 46 | #define DA8XX_EMAC_RAM_OFFSET 0x0000 |
45 | #define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K | 47 | #define DA8XX_EMAC_CTRL_RAM_SIZE SZ_8K |
46 | 48 | ||
49 | #define DA8XX_DMA_SPI0_RX EDMA_CTLR_CHAN(0, 14) | ||
50 | #define DA8XX_DMA_SPI0_TX EDMA_CTLR_CHAN(0, 15) | ||
47 | #define DA8XX_DMA_MMCSD0_RX EDMA_CTLR_CHAN(0, 16) | 51 | #define DA8XX_DMA_MMCSD0_RX EDMA_CTLR_CHAN(0, 16) |
48 | #define DA8XX_DMA_MMCSD0_TX EDMA_CTLR_CHAN(0, 17) | 52 | #define DA8XX_DMA_MMCSD0_TX EDMA_CTLR_CHAN(0, 17) |
53 | #define DA8XX_DMA_SPI1_RX EDMA_CTLR_CHAN(0, 18) | ||
54 | #define DA8XX_DMA_SPI1_TX EDMA_CTLR_CHAN(0, 19) | ||
49 | #define DA850_DMA_MMCSD1_RX EDMA_CTLR_CHAN(1, 28) | 55 | #define DA850_DMA_MMCSD1_RX EDMA_CTLR_CHAN(1, 28) |
50 | #define DA850_DMA_MMCSD1_TX EDMA_CTLR_CHAN(1, 29) | 56 | #define DA850_DMA_MMCSD1_TX EDMA_CTLR_CHAN(1, 29) |
51 | 57 | ||
@@ -723,3 +729,101 @@ int __init da8xx_register_cpuidle(void) | |||
723 | 729 | ||
724 | return platform_device_register(&da8xx_cpuidle_device); | 730 | return platform_device_register(&da8xx_cpuidle_device); |
725 | } | 731 | } |
732 | |||
733 | static struct resource da8xx_spi0_resources[] = { | ||
734 | [0] = { | ||
735 | .start = DA8XX_SPI0_BASE, | ||
736 | .end = DA8XX_SPI0_BASE + SZ_4K - 1, | ||
737 | .flags = IORESOURCE_MEM, | ||
738 | }, | ||
739 | [1] = { | ||
740 | .start = IRQ_DA8XX_SPINT0, | ||
741 | .end = IRQ_DA8XX_SPINT0, | ||
742 | .flags = IORESOURCE_IRQ, | ||
743 | }, | ||
744 | [2] = { | ||
745 | .start = DA8XX_DMA_SPI0_RX, | ||
746 | .end = DA8XX_DMA_SPI0_RX, | ||
747 | .flags = IORESOURCE_DMA, | ||
748 | }, | ||
749 | [3] = { | ||
750 | .start = DA8XX_DMA_SPI0_TX, | ||
751 | .end = DA8XX_DMA_SPI0_TX, | ||
752 | .flags = IORESOURCE_DMA, | ||
753 | }, | ||
754 | }; | ||
755 | |||
756 | static struct resource da8xx_spi1_resources[] = { | ||
757 | [0] = { | ||
758 | .start = DA8XX_SPI1_BASE, | ||
759 | .end = DA8XX_SPI1_BASE + SZ_4K - 1, | ||
760 | .flags = IORESOURCE_MEM, | ||
761 | }, | ||
762 | [1] = { | ||
763 | .start = IRQ_DA8XX_SPINT1, | ||
764 | .end = IRQ_DA8XX_SPINT1, | ||
765 | .flags = IORESOURCE_IRQ, | ||
766 | }, | ||
767 | [2] = { | ||
768 | .start = DA8XX_DMA_SPI1_RX, | ||
769 | .end = DA8XX_DMA_SPI1_RX, | ||
770 | .flags = IORESOURCE_DMA, | ||
771 | }, | ||
772 | [3] = { | ||
773 | .start = DA8XX_DMA_SPI1_TX, | ||
774 | .end = DA8XX_DMA_SPI1_TX, | ||
775 | .flags = IORESOURCE_DMA, | ||
776 | }, | ||
777 | }; | ||
778 | |||
779 | struct davinci_spi_platform_data da8xx_spi_pdata[] = { | ||
780 | [0] = { | ||
781 | .version = SPI_VERSION_2, | ||
782 | .intr_line = 1, | ||
783 | .dma_event_q = EVENTQ_0, | ||
784 | }, | ||
785 | [1] = { | ||
786 | .version = SPI_VERSION_2, | ||
787 | .intr_line = 1, | ||
788 | .dma_event_q = EVENTQ_0, | ||
789 | }, | ||
790 | }; | ||
791 | |||
792 | static struct platform_device da8xx_spi_device[] = { | ||
793 | [0] = { | ||
794 | .name = "spi_davinci", | ||
795 | .id = 0, | ||
796 | .num_resources = ARRAY_SIZE(da8xx_spi0_resources), | ||
797 | .resource = da8xx_spi0_resources, | ||
798 | .dev = { | ||
799 | .platform_data = &da8xx_spi_pdata[0], | ||
800 | }, | ||
801 | }, | ||
802 | [1] = { | ||
803 | .name = "spi_davinci", | ||
804 | .id = 1, | ||
805 | .num_resources = ARRAY_SIZE(da8xx_spi1_resources), | ||
806 | .resource = da8xx_spi1_resources, | ||
807 | .dev = { | ||
808 | .platform_data = &da8xx_spi_pdata[1], | ||
809 | }, | ||
810 | }, | ||
811 | }; | ||
812 | |||
813 | int __init da8xx_register_spi(int instance, struct spi_board_info *info, | ||
814 | unsigned len) | ||
815 | { | ||
816 | int ret; | ||
817 | |||
818 | if (instance < 0 || instance > 1) | ||
819 | return -EINVAL; | ||
820 | |||
821 | ret = spi_register_board_info(info, len); | ||
822 | if (ret) | ||
823 | pr_warning("%s: failed to register board info for spi %d :" | ||
824 | " %d\n", __func__, instance, ret); | ||
825 | |||
826 | da8xx_spi_pdata[instance].num_chipselect = len; | ||
827 | |||
828 | return platform_device_register(&da8xx_spi_device[instance]); | ||
829 | } | ||