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authorSudhakar Rajashekhara <sudhakar.raj@ti.com>2009-08-11 11:10:50 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2009-08-26 04:55:51 -0400
commit53ca5c916971f72262ef37287e17f0a7d980362c (patch)
treeeddf62860c6af582c20d687a5627f4a028556d5e /arch/arm/mach-davinci/da850.c
parentcc36e97b0b33d9041928e4db45654223a59c1a75 (diff)
davinci: Configure MDIO pins for EMAC
Earlier patch which adds EMAC support for da850/omap-l138 was not configuring the MDIO pins. Ethernet was working fine with the earlier patch, because the MDIO pins were configured from the boot loader. This patch removes that dependency. Also, this patch populates a member in the emac clk structure to say that EMAC LPSC sits on controller 1. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/da850.c')
-rw-r--r--arch/arm/mach-davinci/da850.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 4a43ae2bec09..22205a3727a7 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -287,6 +287,7 @@ static struct clk emac_clk = {
287 .name = "emac", 287 .name = "emac",
288 .parent = &pll0_sysclk4, 288 .parent = &pll0_sysclk4,
289 .lpsc = DA8XX_LPSC1_CPGMAC, 289 .lpsc = DA8XX_LPSC1_CPGMAC,
290 .psc_ctlr = 1,
290}; 291};
291 292
292static struct davinci_clk da850_clks[] = { 293static struct davinci_clk da850_clks[] = {
@@ -370,6 +371,8 @@ static const struct mux_config da850_pins[] = {
370 MUX_CFG(DA850, MII_RXD_2, 3, 20, 15, 8, false) 371 MUX_CFG(DA850, MII_RXD_2, 3, 20, 15, 8, false)
371 MUX_CFG(DA850, MII_RXD_1, 3, 24, 15, 8, false) 372 MUX_CFG(DA850, MII_RXD_1, 3, 24, 15, 8, false)
372 MUX_CFG(DA850, MII_RXD_0, 3, 28, 15, 8, false) 373 MUX_CFG(DA850, MII_RXD_0, 3, 28, 15, 8, false)
374 MUX_CFG(DA850, MDIO_CLK, 4, 0, 15, 8, false)
375 MUX_CFG(DA850, MDIO_D, 4, 4, 15, 8, false)
373#endif 376#endif
374}; 377};
375 378
@@ -402,7 +405,8 @@ const short da850_cpgmac_pins[] __initdata = {
402 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3, 405 DA850_MII_TXEN, DA850_MII_TXCLK, DA850_MII_COL, DA850_MII_TXD_3,
403 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER, 406 DA850_MII_TXD_2, DA850_MII_TXD_1, DA850_MII_TXD_0, DA850_MII_RXER,
404 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3, 407 DA850_MII_CRS, DA850_MII_RXCLK, DA850_MII_RXDV, DA850_MII_RXD_3,
405 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, 408 DA850_MII_RXD_2, DA850_MII_RXD_1, DA850_MII_RXD_0, DA850_MDIO_CLK,
409 DA850_MDIO_D,
406 -1 410 -1
407}; 411};
408 412