davinci: RMII support for DA850/OMAP-L138 EVM

DA850/OMAP-L138 EVM has a RMII Ethernet PHY on the UI daughter card. The PHY
is enabled by proper programming of the IO Expander (TCA6416) ports. Also for
RMII PHY to work, the MDIO clock of MII PHY has to be disabled since both the
PHYs have the same address. This is done via the GPIO2[6] pin. This patch adds
support for RMII PHY.

This patch also adds a menuconfig option to select one or no peripheral
connected to expander. Currently, sub-options in this menu are RMII and no
peripheral.This menuconfig option is similar to the one present for UI card on
DA830/OMAP-L137 EVM.

Signed-off-by: Chaithrika U S <chaithrika@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

1 files changed, 17 insertions, 0 deletions

diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 1d6d8b42a624..b804d5792346 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -422,6 +422,14 @@ static const struct mux_config da850_pins[] = {
         MUX_CFG(DA850, MII_RXD_0,       3,      28,     15,     8,      false)
         MUX_CFG(DA850, MDIO_CLK,        4,      0,      15,     8,      false)
         MUX_CFG(DA850, MDIO_D,          4,      4,      15,     8,      false)
+        MUX_CFG(DA850, RMII_TXD_0,      14,     12,     15,     8,      false)
+        MUX_CFG(DA850, RMII_TXD_1,      14,     8,      15,     8,      false)
+        MUX_CFG(DA850, RMII_TXEN,       14,     16,     15,     8,      false)
+        MUX_CFG(DA850, RMII_CRS_DV,     15,     4,      15,     8,      false)
+        MUX_CFG(DA850, RMII_RXD_0,      14,     24,     15,     8,      false)
+        MUX_CFG(DA850, RMII_RXD_1,      14,     20,     15,     8,      false)
+        MUX_CFG(DA850, RMII_RXER,       14,     28,     15,     8,      false)
+        MUX_CFG(DA850, RMII_MHZ_50_CLK, 15,     0,      15,     0,      false)
         /* McASP function */
         MUX_CFG(DA850,  ACLKR,          0,      0,      15,     1,      false)
         MUX_CFG(DA850,  ACLKX,          0,      4,      15,     1,      false)
@@ -524,6 +532,7 @@ static const struct mux_config da850_pins[] = {
         MUX_CFG(DA850, EMA_WAIT_1,      6,      24,     15,     1,      false)
         MUX_CFG(DA850, NEMA_CS_2,       7,      0,      15,     1,      false)
         /* GPIO function */
+        MUX_CFG(DA850, GPIO2_6,         6,      4,      15,     8,      false)
         MUX_CFG(DA850, GPIO2_8,         5,      28,     15,     8,      false)
         MUX_CFG(DA850, GPIO2_15,        5,      0,      15,     8,      false)
         MUX_CFG(DA850, GPIO4_0,         10,     28,     15,     8,      false)
@@ -565,6 +574,14 @@ const short da850_cpgmac_pins[] __initdata = {
         -1
 };
 
+const short da850_rmii_pins[] __initdata = {
+        DA850_RMII_TXD_0, DA850_RMII_TXD_1, DA850_RMII_TXEN,
+        DA850_RMII_CRS_DV, DA850_RMII_RXD_0, DA850_RMII_RXD_1,
+        DA850_RMII_RXER, DA850_RMII_MHZ_50_CLK, DA850_MDIO_CLK,
+        DA850_MDIO_D,
+        -1
+};
+
 const short da850_mcasp_pins[] __initdata = {
         DA850_AHCLKX, DA850_ACLKX, DA850_AFSX,
         DA850_AHCLKR, DA850_ACLKR, DA850_AFSR, DA850_AMUTE,