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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2009-09-30 11:48:03 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2009-11-25 13:21:30 -0500
commit789a785ee4351a0b425d1b3702d40aeb71745ff3 (patch)
tree0ac26280bcbd162c94d53e568f1c3c404474e0f4 /arch/arm/mach-davinci/da830.c
parenta9eb1f675c3363a174a424f7834e768d17cd20e5 (diff)
davinci: DA8xx: rename 'psc_ctlr' field into 'gpsc'
Replace badly chosen 'psc_ctlr' name of the 'struct clk' field (PSC already means "Power and Sleep Controller", so the '_ctlr' postfix makes the name tautological) with technically correct 'gpsc' (Global PSC -- which contains all the module registers). Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/da830.c')
-rw-r--r--arch/arm/mach-davinci/da830.c42
1 files changed, 21 insertions, 21 deletions
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index a2f2bdc91400..215d2ecc102f 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -193,14 +193,14 @@ static struct clk uart1_clk = {
193 .name = "uart1", 193 .name = "uart1",
194 .parent = &pll0_sysclk2, 194 .parent = &pll0_sysclk2,
195 .lpsc = DA8XX_LPSC1_UART1, 195 .lpsc = DA8XX_LPSC1_UART1,
196 .psc_ctlr = 1, 196 .gpsc = 1,
197}; 197};
198 198
199static struct clk uart2_clk = { 199static struct clk uart2_clk = {
200 .name = "uart2", 200 .name = "uart2",
201 .parent = &pll0_sysclk2, 201 .parent = &pll0_sysclk2,
202 .lpsc = DA8XX_LPSC1_UART2, 202 .lpsc = DA8XX_LPSC1_UART2,
203 .psc_ctlr = 1, 203 .gpsc = 1,
204}; 204};
205 205
206static struct clk spi0_clk = { 206static struct clk spi0_clk = {
@@ -213,98 +213,98 @@ static struct clk spi1_clk = {
213 .name = "spi1", 213 .name = "spi1",
214 .parent = &pll0_sysclk2, 214 .parent = &pll0_sysclk2,
215 .lpsc = DA8XX_LPSC1_SPI1, 215 .lpsc = DA8XX_LPSC1_SPI1,
216 .psc_ctlr = 1, 216 .gpsc = 1,
217}; 217};
218 218
219static struct clk ecap0_clk = { 219static struct clk ecap0_clk = {
220 .name = "ecap0", 220 .name = "ecap0",
221 .parent = &pll0_sysclk2, 221 .parent = &pll0_sysclk2,
222 .lpsc = DA8XX_LPSC1_ECAP, 222 .lpsc = DA8XX_LPSC1_ECAP,
223 .psc_ctlr = 1, 223 .gpsc = 1,
224}; 224};
225 225
226static struct clk ecap1_clk = { 226static struct clk ecap1_clk = {
227 .name = "ecap1", 227 .name = "ecap1",
228 .parent = &pll0_sysclk2, 228 .parent = &pll0_sysclk2,
229 .lpsc = DA8XX_LPSC1_ECAP, 229 .lpsc = DA8XX_LPSC1_ECAP,
230 .psc_ctlr = 1, 230 .gpsc = 1,
231}; 231};
232 232
233static struct clk ecap2_clk = { 233static struct clk ecap2_clk = {
234 .name = "ecap2", 234 .name = "ecap2",
235 .parent = &pll0_sysclk2, 235 .parent = &pll0_sysclk2,
236 .lpsc = DA8XX_LPSC1_ECAP, 236 .lpsc = DA8XX_LPSC1_ECAP,
237 .psc_ctlr = 1, 237 .gpsc = 1,
238}; 238};
239 239
240static struct clk pwm0_clk = { 240static struct clk pwm0_clk = {
241 .name = "pwm0", 241 .name = "pwm0",
242 .parent = &pll0_sysclk2, 242 .parent = &pll0_sysclk2,
243 .lpsc = DA8XX_LPSC1_PWM, 243 .lpsc = DA8XX_LPSC1_PWM,
244 .psc_ctlr = 1, 244 .gpsc = 1,
245}; 245};
246 246
247static struct clk pwm1_clk = { 247static struct clk pwm1_clk = {
248 .name = "pwm1", 248 .name = "pwm1",
249 .parent = &pll0_sysclk2, 249 .parent = &pll0_sysclk2,
250 .lpsc = DA8XX_LPSC1_PWM, 250 .lpsc = DA8XX_LPSC1_PWM,
251 .psc_ctlr = 1, 251 .gpsc = 1,
252}; 252};
253 253
254static struct clk pwm2_clk = { 254static struct clk pwm2_clk = {
255 .name = "pwm2", 255 .name = "pwm2",
256 .parent = &pll0_sysclk2, 256 .parent = &pll0_sysclk2,
257 .lpsc = DA8XX_LPSC1_PWM, 257 .lpsc = DA8XX_LPSC1_PWM,
258 .psc_ctlr = 1, 258 .gpsc = 1,
259}; 259};
260 260
261static struct clk eqep0_clk = { 261static struct clk eqep0_clk = {
262 .name = "eqep0", 262 .name = "eqep0",
263 .parent = &pll0_sysclk2, 263 .parent = &pll0_sysclk2,
264 .lpsc = DA830_LPSC1_EQEP, 264 .lpsc = DA830_LPSC1_EQEP,
265 .psc_ctlr = 1, 265 .gpsc = 1,
266}; 266};
267 267
268static struct clk eqep1_clk = { 268static struct clk eqep1_clk = {
269 .name = "eqep1", 269 .name = "eqep1",
270 .parent = &pll0_sysclk2, 270 .parent = &pll0_sysclk2,
271 .lpsc = DA830_LPSC1_EQEP, 271 .lpsc = DA830_LPSC1_EQEP,
272 .psc_ctlr = 1, 272 .gpsc = 1,
273}; 273};
274 274
275static struct clk lcdc_clk = { 275static struct clk lcdc_clk = {
276 .name = "lcdc", 276 .name = "lcdc",
277 .parent = &pll0_sysclk2, 277 .parent = &pll0_sysclk2,
278 .lpsc = DA8XX_LPSC1_LCDC, 278 .lpsc = DA8XX_LPSC1_LCDC,
279 .psc_ctlr = 1, 279 .gpsc = 1,
280}; 280};
281 281
282static struct clk mcasp0_clk = { 282static struct clk mcasp0_clk = {
283 .name = "mcasp0", 283 .name = "mcasp0",
284 .parent = &pll0_sysclk2, 284 .parent = &pll0_sysclk2,
285 .lpsc = DA8XX_LPSC1_McASP0, 285 .lpsc = DA8XX_LPSC1_McASP0,
286 .psc_ctlr = 1, 286 .gpsc = 1,
287}; 287};
288 288
289static struct clk mcasp1_clk = { 289static struct clk mcasp1_clk = {
290 .name = "mcasp1", 290 .name = "mcasp1",
291 .parent = &pll0_sysclk2, 291 .parent = &pll0_sysclk2,
292 .lpsc = DA830_LPSC1_McASP1, 292 .lpsc = DA830_LPSC1_McASP1,
293 .psc_ctlr = 1, 293 .gpsc = 1,
294}; 294};
295 295
296static struct clk mcasp2_clk = { 296static struct clk mcasp2_clk = {
297 .name = "mcasp2", 297 .name = "mcasp2",
298 .parent = &pll0_sysclk2, 298 .parent = &pll0_sysclk2,
299 .lpsc = DA830_LPSC1_McASP2, 299 .lpsc = DA830_LPSC1_McASP2,
300 .psc_ctlr = 1, 300 .gpsc = 1,
301}; 301};
302 302
303static struct clk usb20_clk = { 303static struct clk usb20_clk = {
304 .name = "usb20", 304 .name = "usb20",
305 .parent = &pll0_sysclk2, 305 .parent = &pll0_sysclk2,
306 .lpsc = DA8XX_LPSC1_USB20, 306 .lpsc = DA8XX_LPSC1_USB20,
307 .psc_ctlr = 1, 307 .gpsc = 1,
308}; 308};
309 309
310static struct clk aemif_clk = { 310static struct clk aemif_clk = {
@@ -332,36 +332,36 @@ static struct clk emac_clk = {
332 .name = "emac", 332 .name = "emac",
333 .parent = &pll0_sysclk4, 333 .parent = &pll0_sysclk4,
334 .lpsc = DA8XX_LPSC1_CPGMAC, 334 .lpsc = DA8XX_LPSC1_CPGMAC,
335 .psc_ctlr = 1, 335 .gpsc = 1,
336}; 336};
337 337
338static struct clk gpio_clk = { 338static struct clk gpio_clk = {
339 .name = "gpio", 339 .name = "gpio",
340 .parent = &pll0_sysclk4, 340 .parent = &pll0_sysclk4,
341 .lpsc = DA8XX_LPSC1_GPIO, 341 .lpsc = DA8XX_LPSC1_GPIO,
342 .psc_ctlr = 1, 342 .gpsc = 1,
343}; 343};
344 344
345static struct clk i2c1_clk = { 345static struct clk i2c1_clk = {
346 .name = "i2c1", 346 .name = "i2c1",
347 .parent = &pll0_sysclk4, 347 .parent = &pll0_sysclk4,
348 .lpsc = DA8XX_LPSC1_I2C, 348 .lpsc = DA8XX_LPSC1_I2C,
349 .psc_ctlr = 1, 349 .gpsc = 1,
350}; 350};
351 351
352static struct clk usb11_clk = { 352static struct clk usb11_clk = {
353 .name = "usb11", 353 .name = "usb11",
354 .parent = &pll0_sysclk4, 354 .parent = &pll0_sysclk4,
355 .lpsc = DA8XX_LPSC1_USB11, 355 .lpsc = DA8XX_LPSC1_USB11,
356 .psc_ctlr = 1, 356 .gpsc = 1,
357}; 357};
358 358
359static struct clk emif3_clk = { 359static struct clk emif3_clk = {
360 .name = "emif3", 360 .name = "emif3",
361 .parent = &pll0_sysclk5, 361 .parent = &pll0_sysclk5,
362 .lpsc = DA8XX_LPSC1_EMIF3C, 362 .lpsc = DA8XX_LPSC1_EMIF3C,
363 .gpsc = 1,
363 .flags = ALWAYS_ENABLED, 364 .flags = ALWAYS_ENABLED,
364 .psc_ctlr = 1,
365}; 365};
366 366
367static struct clk arm_clk = { 367static struct clk arm_clk = {