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authorLennert Buytenhek <buytenh@wantstofly.org>2010-11-29 04:27:27 -0500
committerLennert Buytenhek <buytenh@wantstofly.org>2011-01-13 11:18:26 -0500
commit23265442b02b3cc3c0dd2bf89bc235970c629806 (patch)
tree97a985d585a838dbd2e4e8aee53d6cf42597bfaa /arch/arm/mach-davinci/cp_intc.c
parent8ad357ca4dd99a0f277528e63746bb04629de213 (diff)
ARM: davinci: irq_data conversion.
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
Diffstat (limited to 'arch/arm/mach-davinci/cp_intc.c')
-rw-r--r--arch/arm/mach-davinci/cp_intc.c30
1 files changed, 15 insertions, 15 deletions
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index bb4c40ecb803..9abc80a86a22 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -26,30 +26,30 @@ static inline void cp_intc_write(unsigned long value, unsigned offset)
26 __raw_writel(value, davinci_intc_base + offset); 26 __raw_writel(value, davinci_intc_base + offset);
27} 27}
28 28
29static void cp_intc_ack_irq(unsigned int irq) 29static void cp_intc_ack_irq(struct irq_data *d)
30{ 30{
31 cp_intc_write(irq, CP_INTC_SYS_STAT_IDX_CLR); 31 cp_intc_write(d->irq, CP_INTC_SYS_STAT_IDX_CLR);
32} 32}
33 33
34/* Disable interrupt */ 34/* Disable interrupt */
35static void cp_intc_mask_irq(unsigned int irq) 35static void cp_intc_mask_irq(struct irq_data *d)
36{ 36{
37 /* XXX don't know why we need to disable nIRQ here... */ 37 /* XXX don't know why we need to disable nIRQ here... */
38 cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_CLR); 38 cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_CLR);
39 cp_intc_write(irq, CP_INTC_SYS_ENABLE_IDX_CLR); 39 cp_intc_write(d->irq, CP_INTC_SYS_ENABLE_IDX_CLR);
40 cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_SET); 40 cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_SET);
41} 41}
42 42
43/* Enable interrupt */ 43/* Enable interrupt */
44static void cp_intc_unmask_irq(unsigned int irq) 44static void cp_intc_unmask_irq(struct irq_data *d)
45{ 45{
46 cp_intc_write(irq, CP_INTC_SYS_ENABLE_IDX_SET); 46 cp_intc_write(d->irq, CP_INTC_SYS_ENABLE_IDX_SET);
47} 47}
48 48
49static int cp_intc_set_irq_type(unsigned int irq, unsigned int flow_type) 49static int cp_intc_set_irq_type(struct irq_data *d, unsigned int flow_type)
50{ 50{
51 unsigned reg = BIT_WORD(irq); 51 unsigned reg = BIT_WORD(d->irq);
52 unsigned mask = BIT_MASK(irq); 52 unsigned mask = BIT_MASK(d->irq);
53 unsigned polarity = cp_intc_read(CP_INTC_SYS_POLARITY(reg)); 53 unsigned polarity = cp_intc_read(CP_INTC_SYS_POLARITY(reg));
54 unsigned type = cp_intc_read(CP_INTC_SYS_TYPE(reg)); 54 unsigned type = cp_intc_read(CP_INTC_SYS_TYPE(reg));
55 55
@@ -85,18 +85,18 @@ static int cp_intc_set_irq_type(unsigned int irq, unsigned int flow_type)
85 * generic drivers which call {enable|disable}_irq_wake for 85 * generic drivers which call {enable|disable}_irq_wake for
86 * wake up interrupt sources (eg RTC on DA850). 86 * wake up interrupt sources (eg RTC on DA850).
87 */ 87 */
88static int cp_intc_set_wake(unsigned int irq, unsigned int on) 88static int cp_intc_set_wake(struct irq_data *d, unsigned int on)
89{ 89{
90 return 0; 90 return 0;
91} 91}
92 92
93static struct irq_chip cp_intc_irq_chip = { 93static struct irq_chip cp_intc_irq_chip = {
94 .name = "cp_intc", 94 .name = "cp_intc",
95 .ack = cp_intc_ack_irq, 95 .irq_ack = cp_intc_ack_irq,
96 .mask = cp_intc_mask_irq, 96 .irq_mask = cp_intc_mask_irq,
97 .unmask = cp_intc_unmask_irq, 97 .irq_unmask = cp_intc_unmask_irq,
98 .set_type = cp_intc_set_irq_type, 98 .irq_set_type = cp_intc_set_irq_type,
99 .set_wake = cp_intc_set_wake, 99 .irq_set_wake = cp_intc_set_wake,
100}; 100};
101 101
102void __init cp_intc_init(void) 102void __init cp_intc_init(void)