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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2010-04-16 13:29:11 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2010-05-06 18:02:06 -0400
commit7034217467abe91b5bc63fc2993bb8eec1cf3c9f (patch)
tree5e0aeb13a0b69f111fa53a78f3dc0b61e437087b /arch/arm/mach-davinci/board-dm644x-evm.c
parentef03592a1a8112309f1fca1c11fbaef8ab541ef2 (diff)
DaVinci: move AEMIF #define's to the proper headers
Currently each DaVinci board file #define's its own version of the EMIFA base addresses (all named DAVINCI_ASYNC_EMIF_*_BASE), which leads to duplication. Move these #define's to the SoC specific headers, changing their prefixes from 'DAVINCI' to the 'DM355', 'DM644X', and 'DM646X' since all these base addresses are SoC specific... And while at it, rename DM646X_ASYNC_EMIF_DATA_CE0_BASE to DM646X_ASYNC_EMIF_CS2_SPACE_BASE in order to match the DM646x datasheet. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/board-dm644x-evm.c')
-rw-r--r--arch/arm/mach-davinci/board-dm644x-evm.c18
1 files changed, 6 insertions, 12 deletions
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index 95cef1f46ef2..d028bab6f981 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -43,12 +43,6 @@
43 43
44#define DAVINCI_CFC_ATA_BASE 0x01C66000 44#define DAVINCI_CFC_ATA_BASE 0x01C66000
45 45
46#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000
47#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
48#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
49#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE 0x06000000
50#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE 0x08000000
51
52#define LXT971_PHY_ID (0x001378e2) 46#define LXT971_PHY_ID (0x001378e2)
53#define LXT971_PHY_MASK (0xfffffff0) 47#define LXT971_PHY_MASK (0xfffffff0)
54 48
@@ -92,8 +86,8 @@ static struct physmap_flash_data davinci_evm_norflash_data = {
92/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF 86/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
93 * limits addresses to 16M, so using addresses past 16M will wrap */ 87 * limits addresses to 16M, so using addresses past 16M will wrap */
94static struct resource davinci_evm_norflash_resource = { 88static struct resource davinci_evm_norflash_resource = {
95 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, 89 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
96 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, 90 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
97 .flags = IORESOURCE_MEM, 91 .flags = IORESOURCE_MEM,
98}; 92};
99 93
@@ -154,12 +148,12 @@ static struct davinci_nand_pdata davinci_evm_nandflash_data = {
154 148
155static struct resource davinci_evm_nandflash_resource[] = { 149static struct resource davinci_evm_nandflash_resource[] = {
156 { 150 {
157 .start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE, 151 .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
158 .end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1, 152 .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
159 .flags = IORESOURCE_MEM, 153 .flags = IORESOURCE_MEM,
160 }, { 154 }, {
161 .start = DAVINCI_ASYNC_EMIF_CONTROL_BASE, 155 .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
162 .end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1, 156 .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
163 .flags = IORESOURCE_MEM, 157 .flags = IORESOURCE_MEM,
164 }, 158 },
165}; 159};