diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-07-26 20:41:04 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-07-26 20:41:04 -0400 |
commit | 69f1d1a6acbaa7d83ef3f4ee26209c58cd000204 (patch) | |
tree | 12be981f8a123b8361edd64b84fd72f339a9655d /arch/arm/mach-cns3xxx | |
parent | 2d86a3f04e345b03d5e429bfe14985ce26bff4dc (diff) | |
parent | 1e09939bad24df95ddeeeca4fbec64fa94b66def (diff) |
Merge branch 'next/devel' of ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/devel' of ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (128 commits)
ARM: S5P64X0: External Interrupt Support
ARM: EXYNOS4: Enable MFC on Samsung NURI
ARM: EXYNOS4: Enable MFC on universal_c210
ARM: S5PV210: Enable MFC on Goni
ARM: S5P: Add support for MFC device
ARM: EXYNOS4: Add support FIMD on SMDKC210
ARM: EXYNOS4: Add platform device and helper functions for FIMD
ARM: EXYNOS4: Add resource definition for FIMD
ARM: EXYNOS4: Change devname for FIMD clkdev
ARM: SAMSUNG: Add IRQ_I2S0 definition
ARM: SAMSUNG: Add platform device for idma
ARM: EXYNOS4: Add more registers to be saved and restored for PM
ARM: EXYNOS4: Add more register addresses of CMU
ARM: EXYNOS4: Add platform device for dwmci driver
ARM: EXYNOS4: configure rtc-s3c on NURI
ARM: EXYNOS4: configure MAX8903 secondary charger on NURI
ARM: EXYNOS4: configure ADC on NURI
ARM: EXYNOS4: configure MAX17042 fuel gauge on NURI
ARM: EXYNOS4: configure regulators and PMIC(MAX8997) on NURI
ARM: EXYNOS4: Increase NR_IRQS for devices with more IRQs
...
Fix up tons of silly conflicts:
- arch/arm/mach-davinci/include/mach/psc.h
- arch/arm/mach-exynos4/Kconfig
- arch/arm/mach-exynos4/mach-smdkc210.c
- arch/arm/mach-exynos4/pm.c
- arch/arm/mach-imx/mm-imx1.c
- arch/arm/mach-imx/mm-imx21.c
- arch/arm/mach-imx/mm-imx25.c
- arch/arm/mach-imx/mm-imx27.c
- arch/arm/mach-imx/mm-imx31.c
- arch/arm/mach-imx/mm-imx35.c
- arch/arm/mach-mx5/mm.c
- arch/arm/mach-s5pv210/mach-goni.c
- arch/arm/mm/Kconfig
Diffstat (limited to 'arch/arm/mach-cns3xxx')
-rw-r--r-- | arch/arm/mach-cns3xxx/cns3420vb.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-cns3xxx/core.c | 43 | ||||
-rw-r--r-- | arch/arm/mach-cns3xxx/core.h | 6 |
3 files changed, 51 insertions, 0 deletions
diff --git a/arch/arm/mach-cns3xxx/cns3420vb.c b/arch/arm/mach-cns3xxx/cns3420vb.c index 85e6390795ac..3e7d1496cb47 100644 --- a/arch/arm/mach-cns3xxx/cns3420vb.c +++ b/arch/arm/mach-cns3xxx/cns3420vb.c | |||
@@ -169,6 +169,8 @@ static struct platform_device *cns3420_pdevs[] __initdata = { | |||
169 | 169 | ||
170 | static void __init cns3420_init(void) | 170 | static void __init cns3420_init(void) |
171 | { | 171 | { |
172 | cns3xxx_l2x0_init(); | ||
173 | |||
172 | platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs)); | 174 | platform_add_devices(cns3420_pdevs, ARRAY_SIZE(cns3420_pdevs)); |
173 | 175 | ||
174 | cns3xxx_ahci_init(); | 176 | cns3xxx_ahci_init(); |
diff --git a/arch/arm/mach-cns3xxx/core.c b/arch/arm/mach-cns3xxx/core.c index da30078a80c1..941a308e1253 100644 --- a/arch/arm/mach-cns3xxx/core.c +++ b/arch/arm/mach-cns3xxx/core.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <asm/mach/time.h> | 16 | #include <asm/mach/time.h> |
17 | #include <asm/mach/irq.h> | 17 | #include <asm/mach/irq.h> |
18 | #include <asm/hardware/gic.h> | 18 | #include <asm/hardware/gic.h> |
19 | #include <asm/hardware/cache-l2x0.h> | ||
19 | #include <mach/cns3xxx.h> | 20 | #include <mach/cns3xxx.h> |
20 | #include "core.h" | 21 | #include "core.h" |
21 | 22 | ||
@@ -244,3 +245,45 @@ static void __init cns3xxx_timer_init(void) | |||
244 | struct sys_timer cns3xxx_timer = { | 245 | struct sys_timer cns3xxx_timer = { |
245 | .init = cns3xxx_timer_init, | 246 | .init = cns3xxx_timer_init, |
246 | }; | 247 | }; |
248 | |||
249 | #ifdef CONFIG_CACHE_L2X0 | ||
250 | |||
251 | void __init cns3xxx_l2x0_init(void) | ||
252 | { | ||
253 | void __iomem *base = ioremap(CNS3XXX_L2C_BASE, SZ_4K); | ||
254 | u32 val; | ||
255 | |||
256 | if (WARN_ON(!base)) | ||
257 | return; | ||
258 | |||
259 | /* | ||
260 | * Tag RAM Control register | ||
261 | * | ||
262 | * bit[10:8] - 1 cycle of write accesses latency | ||
263 | * bit[6:4] - 1 cycle of read accesses latency | ||
264 | * bit[3:0] - 1 cycle of setup latency | ||
265 | * | ||
266 | * 1 cycle of latency for setup, read and write accesses | ||
267 | */ | ||
268 | val = readl(base + L2X0_TAG_LATENCY_CTRL); | ||
269 | val &= 0xfffff888; | ||
270 | writel(val, base + L2X0_TAG_LATENCY_CTRL); | ||
271 | |||
272 | /* | ||
273 | * Data RAM Control register | ||
274 | * | ||
275 | * bit[10:8] - 1 cycles of write accesses latency | ||
276 | * bit[6:4] - 1 cycles of read accesses latency | ||
277 | * bit[3:0] - 1 cycle of setup latency | ||
278 | * | ||
279 | * 1 cycle of latency for setup, read and write accesses | ||
280 | */ | ||
281 | val = readl(base + L2X0_DATA_LATENCY_CTRL); | ||
282 | val &= 0xfffff888; | ||
283 | writel(val, base + L2X0_DATA_LATENCY_CTRL); | ||
284 | |||
285 | /* 32 KiB, 8-way, parity disable */ | ||
286 | l2x0_init(base, 0x00540000, 0xfe000fff); | ||
287 | } | ||
288 | |||
289 | #endif /* CONFIG_CACHE_L2X0 */ | ||
diff --git a/arch/arm/mach-cns3xxx/core.h b/arch/arm/mach-cns3xxx/core.h index ffeb3a8b73ba..fcd225343c61 100644 --- a/arch/arm/mach-cns3xxx/core.h +++ b/arch/arm/mach-cns3xxx/core.h | |||
@@ -13,6 +13,12 @@ | |||
13 | 13 | ||
14 | extern struct sys_timer cns3xxx_timer; | 14 | extern struct sys_timer cns3xxx_timer; |
15 | 15 | ||
16 | #ifdef CONFIG_CACHE_L2X0 | ||
17 | void __init cns3xxx_l2x0_init(void); | ||
18 | #else | ||
19 | static inline void cns3xxx_l2x0_init(void) {} | ||
20 | #endif /* CONFIG_CACHE_L2X0 */ | ||
21 | |||
16 | void __init cns3xxx_map_io(void); | 22 | void __init cns3xxx_map_io(void); |
17 | void __init cns3xxx_init_irq(void); | 23 | void __init cns3xxx_init_irq(void); |
18 | void cns3xxx_power_off(void); | 24 | void cns3xxx_power_off(void); |